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Searched refs:set_drr (Results 1 – 25 of 27) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_init.c61 .set_drr = dcn10_set_drr,
Ddcn10_hw_sequencer.c1051 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn10_reset_back_end_for_pipe()
1052 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn10_reset_back_end_for_pipe()
3149 if (pipe_ctx[i]->stream_res.tg->funcs->set_drr) in dcn10_set_drr()
3150 pipe_ctx[i]->stream_res.tg->funcs->set_drr( in dcn10_set_drr()
Ddcn10_optc.c1558 .set_drr = optc1_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_init.c63 .set_drr = dcn10_set_drr,
Ddcn201_optc.c169 .set_drr = optc1_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_init.c69 .set_drr = dcn10_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_init.c64 .set_drr = dcn10_set_drr,
Ddcn20_optc.c530 .set_drr = optc1_set_drr,
Ddcn20_hwseq.c767 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_enable_stream_timing()
768 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_enable_stream_timing()
2415 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_reset_back_end_for_pipe()
2416 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_reset_back_end_for_pipe()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_init.c64 .set_drr = dcn10_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_init.c65 .set_drr = dcn10_set_drr,
Ddcn30_optc.c326 .set_drr = optc1_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_init.c67 .set_drr = dcn10_set_drr,
Ddcn31_optc.c266 .set_drr = optc31_set_drr,
Ddcn31_hwseq.c544 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe()
545 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_init.c64 .set_drr = dcn10_set_drr,
Ddcn32_optc.c284 .set_drr = optc32_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_init.c69 .set_drr = dcn10_set_drr,
Ddcn314_optc.c228 .set_drr = optc31_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_timing_generator.c211 .set_drr = dce110_timing_generator_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_timing_generator.c230 .set_drr = dce110_timing_generator_set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Dtiming_generator.h237 void (*set_drr)(struct timing_generator *tg, const struct drr_params *params); member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/
Dhw_sequencer.h117 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.c1570 if (pipe_ctx->stream_res.tg->funcs->set_drr) in apply_single_controller_ctx_to_hw()
1571 pipe_ctx->stream_res.tg->funcs->set_drr( in apply_single_controller_ctx_to_hw()
1916 static void set_drr(struct pipe_ctx **pipe_ctx, in set_drr() function
1934 pipe_ctx[i]->stream_res.tg->funcs->set_drr( in set_drr()
3152 .set_drr = set_drr,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c1192 .set_drr = dce120_timing_generator_set_drr,

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