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Searched refs:sdmax_rlcx_rb_base (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_arcturus.c175 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in kgd_arcturus_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v8.c301 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v10.c424 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v11.c396 WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_BASE, m->sdmax_rlcx_rb_base); in hqd_sdma_load_v11()
Damdgpu_amdkfd_gfx_v9.c436 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v10_3.c411 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in hqd_sdma_load_v10_3()
Dsdma_v6_0.c845 m->sdmax_rlcx_rb_base = lower_32_bits(prop->hqd_base_gpu_addr >> 8); in sdma_v6_0_mqd_init()
Dsdma_v5_2.c847 m->sdmax_rlcx_rb_base = lower_32_bits(prop->hqd_base_gpu_addr >> 8); in sdma_v5_2_mqd_init()
Dsdma_v5_0.c976 m->sdmax_rlcx_rb_base = lower_32_bits(prop->hqd_base_gpu_addr >> 8); in sdma_v5_0_mqd_init()
/linux-6.1.9/drivers/gpu/drm/amd/amdkfd/
Dkfd_mqd_manager_v11.c339 m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8); in update_mqd_sdma()
Dkfd_mqd_manager_v10.c338 m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8); in update_mqd_sdma()
Dkfd_mqd_manager_v9.c401 m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8); in update_mqd_sdma()
Dkfd_mqd_manager_vi.c378 m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8); in update_mqd_sdma()
/linux-6.1.9/drivers/gpu/drm/amd/include/
Dvi_structs.h29 uint32_t sdmax_rlcx_rb_base; member
Dv9_structs.h29 uint32_t sdmax_rlcx_rb_base; member
Dv11_structs.h544 uint32_t sdmax_rlcx_rb_base; // offset: 1 (0x1) member
Dv10_structs.h545 uint32_t sdmax_rlcx_rb_base; member