Home
last modified time | relevance | path

Searched refs:sdhci_writew (Results 1 – 25 of 25) sorted by relevance

/linux-6.1.9/drivers/mmc/host/
Dsdhci-cns3xxx.c32 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cns3xxx_set_clock()
59 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cns3xxx_set_clock()
73 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cns3xxx_set_clock()
Dsdhci-milbeaut.c94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
193 sdhci_writew(host, ctl, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
Dsdhci-pci-arasan.c111 sdhci_writew(host, data, PHY_DAT_REG); in arasan_phy_write()
112 sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG); in arasan_phy_write()
120 sdhci_writew(host, 0, PHY_DAT_REG); in arasan_phy_read()
121 sdhci_writew(host, offset, PHY_ADDR_REG); in arasan_phy_read()
Dsdhci-pci-o2micro.c202 sdhci_writew(host, reg, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
336 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
341 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
362 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
404 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
551 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
556 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
570 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
Dsdhci-pci-gli.c257 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
277 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
452 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
635 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
826 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
848 sdhci_writew(host, GLI_9763E_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_enable()
874 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_post_disable()
1005 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1023 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
1034 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
Dsdhci-sprd.c170 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
179 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
225 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
281 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
360 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
527 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
Dsdhci.c135 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
345 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
1111 sdhci_writew(host, in sdhci_set_block_info()
1121 sdhci_writew(host, 0, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1122 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1124 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1449 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_auto_cmd_select()
1475 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
1479 sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 | in sdhci_set_transfer_mode()
1502 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
[all …]
Dsdhci_f_sdh30.c68 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
160 sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
Dsdhci-of-at91.c78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
Dsdhci-s3c.c380 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
389 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
399 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
415 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
Dsdhci-pci-dwc-mshc.c70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
Dsdhci-brcmstb.c89 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
123 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
Dsdhci-of-dwcmshc.c177 sdhci_writew(host, ctrl, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); in dwcmshc_set_uhs_signaling()
182 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
Dsdhci-xenon.c219 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
299 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
Dsdhci.h678 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
725 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
Dsdhci-xenon-phy.c611 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
635 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
Dsdhci-tegra.c262 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
1201 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in tegra_cqhci_writel()
1251 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_enable()
1334 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_post_disable()
Dsdhci-acpi.c552 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
556 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
Dsdhci-st.c304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
Dsdhci-pxav3.c294 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
Dsdhci-of-aspeed.c249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
Dsdhci-msm.c1383 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1766 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
2362 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
Dsdhci-pci-core.c1644 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1648 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
Dsdhci-of-arasan.c905 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
Dsdhci-esdhc-imx.c1514 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in esdhc_cqe_enable()