/linux-6.1.9/drivers/mmc/host/ |
D | sdhci-pci-dwc-mshc.c | 41 sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr)); in sdhci_snps_set_clock() 49 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock() 53 sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock() 54 sdhci_writel(host, CLKFBOUT_100_MHZ, in sdhci_snps_set_clock() 57 sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock() 58 sdhci_writel(host, CLKFBOUT_200_MHZ, in sdhci_snps_set_clock() 65 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
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D | sdhci-milbeaut.c | 67 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch() 69 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch() 72 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch() 77 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_milbeaut_soft_voltage_switch() 120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_milbeaut_reset() 138 sdhci_writel(host, 0, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset() 140 sdhci_writel(host, MLB_SOFT_RESET_RSTX, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset() 169 sdhci_writel(host, val, MLB_CR_SET); in sdhci_milbeaut_bridge_init() 171 sdhci_writel(host, MLB_CDR_SET_CLK2POW16, MLB_CDR_SET); in sdhci_milbeaut_bridge_init() 173 sdhci_writel(host, MLB_WP_CD_LED_SET_LED_INV, MLB_WP_CD_LED_SET); in sdhci_milbeaut_bridge_init() [all …]
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D | sdhci-of-esdhc.c | 522 sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); in esdhc_of_adma_workaround() 545 sdhci_writel(host, value, ESDHC_DMA_SYSCTL); in esdhc_of_enable_dma() 597 sdhci_writel(host, val, ESDHC_SYSTEM_CONTROL); in esdhc_clock_enable() 625 sdhci_writel(host, val, ESDHC_DMA_SYSCTL); in esdhc_flush_async_fifo() 718 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock() 742 sdhci_writel(host, temp | ESDHC_HS400_MODE, ESDHC_TBCTL); in esdhc_of_set_clock() 744 sdhci_writel(host, temp | ESDHC_CMD_CLK_CTL, ESDHC_SDCLKCTL); in esdhc_of_set_clock() 751 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock() 754 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock() 757 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock() [all …]
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D | sdhci-of-dwcmshc.c | 200 sdhci_writel(host, vendor, reg); in dwcmshc_hs400_enhanced_strobe() 234 sdhci_writel(host, extra, reg); in dwcmshc_rk3568_set_clock() 238 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 239 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock() 240 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_set_clock() 241 sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT); in dwcmshc_rk3568_set_clock() 250 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock() 255 sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 257 sdhci_writel(host, 0x0, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock() 266 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock() [all …]
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D | sdhci_f_sdh30.c | 37 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch() 39 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch() 42 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch() 49 sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_soft_voltage_switch() 54 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_f_sdh30_soft_voltage_switch() 75 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_reset() 163 sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe() 165 sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
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D | sdhci-xenon-phy.c | 237 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_init() 353 sdhci_writel(host, reg, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll() 408 sdhci_writel(host, reg, XENON_SLOT_OP_STATUS_CTRL); in xenon_emmc_phy_config_tuning() 422 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_disable_strobe() 428 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_disable_strobe() 432 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_disable_strobe() 465 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_strobe_delay_adj() 472 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_strobe_delay_adj() 477 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_strobe_delay_adj() 536 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_slow_mode() [all …]
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D | sdhci-bcm-kona.c | 59 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset() 79 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset() 91 sdhci_writel(host, val, KONA_SDHOST_COREIMR); in sdhci_bcm_kona_sd_init() 104 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_init() 139 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate() 142 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
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D | sdhci-xenon.c | 32 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk() 66 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_sdclk_off_idle() 79 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_acg() 90 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_enable_sdhc() 108 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_disable_sdhc() 119 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_enable_sdhc_parallel_tran() 129 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_mask_cmd_conflict_err() 141 sdhci_writel(host, reg, XENON_SLOT_RETUNING_REQ_CTRL); in xenon_retune_setup() 146 sdhci_writel(host, reg, SDHCI_SIGNAL_ENABLE); in xenon_retune_setup() 149 sdhci_writel(host, reg, SDHCI_INT_ENABLE); in xenon_retune_setup() [all …]
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D | sdhci-pci-gli.c | 168 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on() 185 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_off() 215 sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING); in gli_set_9750() 220 sdhci_writel(host, sw_ctrl_value, SDHCI_GLI_9750_SW_CTRL); in gli_set_9750() 251 sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL); in gli_set_9750() 252 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750() 263 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750() 266 sdhci_writel(host, parameter_value, SDHCI_GLI_9750_TUNING_PARAMETERS); in gli_set_9750() 272 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750() 297 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750_rx_inv() [all …]
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D | sdhci-sprd.c | 115 sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE); in sdhci_sprd_init_config() 192 sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); in sdhci_sprd_set_dll_invert() 238 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock() 249 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll() 256 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll() 262 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll() 363 sdhci_writel(host, p[timing], SDHCI_SPRD_REG_32_DLL_DLY); in sdhci_sprd_set_uhs_signaling() 532 sdhci_writel(host, p[MMC_TIMING_MMC_HS400 + 1], in sdhci_sprd_hs400_enhanced_strobe()
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D | sdhci-tegra.c | 354 sdhci_writel(host, reg, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap() 406 sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_reset() 407 sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_reset() 413 sdhci_writel(host, pad_ctrl, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_reset() 436 sdhci_writel(host, val, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_configure_cal_pad() 450 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_set_pad_autocal_offset() 496 sdhci_writel(host, reg, in tegra_sdhci_set_padctrl() 558 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib() 576 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib() 814 sdhci_writel(host, val, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL); in tegra_sdhci_hs400_enhanced_strobe() [all …]
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D | sdhci.c | 172 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection() 173 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection() 309 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs() 310 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs() 609 sdhci_writel(host, scratch, SDHCI_BUFFER); in sdhci_write_block_pio() 896 sdhci_writel(host, lower_32_bits(addr), SDHCI_ADMA_ADDRESS); in sdhci_set_adma_addr() 898 sdhci_writel(host, upper_32_bits(addr), SDHCI_ADMA_ADDRESS_HI); in sdhci_set_adma_addr() 914 sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); in sdhci_set_sdma_addr() 1052 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs() 1053 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs() [all …]
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D | sdhci-pci-o2micro.c | 113 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 116 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 120 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 147 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock() 260 sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_dll_recovery() 672 sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2); in sdhci_pci_o2_probe_slot()
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D | sdhci-of-arasan.c | 361 sdhci_writel(host, vendor, SDHCI_ARASAN_VENDOR_REGISTER); in sdhci_arasan_hs400_enhanced_strobe() 814 sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); in sdhci_versal_sdcardclk_set_phase() 817 sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); in sdhci_versal_sdcardclk_set_phase() 881 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase() 883 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase() 886 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase() 888 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase()
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D | sdhci-omap.c | 495 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_omap_execute_tuning() 496 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_execute_tuning() 522 sdhci_writel(host, ier, SDHCI_INT_ENABLE); in sdhci_omap_card_busy() 523 sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_card_busy() 538 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_omap_card_busy() 539 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_card_busy() 913 sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); in sdhci_omap_irq()
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D | sdhci-acpi.c | 401 sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG); in sdhci_acpi_qcom_handler() 402 sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG); in sdhci_acpi_qcom_handler() 516 sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER); in sdhci_acpi_amd_hs400_dll() 519 sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER); in sdhci_acpi_amd_hs400_dll()
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D | sdhci-esdhc-mcf.c | 201 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in esdhc_mcf_reset() 202 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in esdhc_mcf_reset()
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D | sdhci.h | 670 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) in sdhci_writel() function 720 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) in sdhci_writel() function
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D | sdhci-esdhc-imx.c | 933 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock() 961 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock() 1295 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in esdhc_reset() 1296 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in esdhc_reset()
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D | sdhci-brcmstb.c | 51 sdhci_writel(host, reg, SDHCI_VENDOR); in enable_clock_gating()
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D | sdhci-of-at91.c | 128 sdhci_writel(host, calcr | SDMMC_CALCR_ALWYSON | SDMMC_CALCR_EN, in sdhci_at91_reset()
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D | sdhci-pci-core.c | 655 sdhci_writel(host, val, INTEL_HS400_ES_REG); in intel_hs400_enhanced_strobe() 1032 sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1); in glk_rpm_retune_wa()
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D | sdhci-msm.c | 2085 sdhci_writel(host, ctrl, SDHCI_INT_ENABLE); in sdhci_msm_cqe_disable() 2086 sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); in sdhci_msm_cqe_disable()
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