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Searched refs:sar (Results 1 – 25 of 138) sorted by relevance

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/linux-6.1.9/drivers/clk/mvebu/
Dorion.c28 static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar) in mv88f5181_get_tclk_freq() argument
30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) & in mv88f5181_get_tclk_freq()
45 static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar) in mv88f5181_get_cpu_freq() argument
47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_cpu_freq()
59 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, in mv88f5181_get_clk_ratio() argument
62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) & in mv88f5181_get_clk_ratio()
98 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) in mv88f5182_get_tclk_freq() argument
100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) & in mv88f5182_get_tclk_freq()
113 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) in mv88f5182_get_cpu_freq() argument
115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) & in mv88f5182_get_cpu_freq()
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Darmada-370.c45 static u32 __init a370_get_tclk_freq(void __iomem *sar) in a370_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) & in a370_get_tclk_freq()
64 static u32 __init a370_get_cpu_freq(void __iomem *sar) in a370_get_cpu_freq() argument
69 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) & in a370_get_cpu_freq()
114 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
116 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) & in a370_get_clk_ratio()
135 static bool a370_is_sscg_enabled(void __iomem *sar) in a370_is_sscg_enabled() argument
137 return !(readl(sar) & SARL_A370_SSCG_ENABLE); in a370_is_sscg_enabled()
Dkirkwood.c86 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) in kirkwood_get_tclk_freq() argument
88 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) & in kirkwood_get_tclk_freq()
108 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) in kirkwood_get_cpu_freq() argument
110 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar)); in kirkwood_get_cpu_freq()
127 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
132 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar)); in kirkwood_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) & in kirkwood_get_clk_ratio()
155 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) in mv88f6180_get_cpu_freq() argument
157 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK; in mv88f6180_get_cpu_freq()
167 void __iomem *sar, int id, int *mult, int *div) in mv88f6180_get_clk_ratio() argument
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Darmada-39x.c45 static u32 __init armada_39x_get_tclk_freq(void __iomem *sar) in armada_39x_get_tclk_freq() argument
49 tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) & in armada_39x_get_tclk_freq()
68 static u32 __init armada_39x_get_cpu_freq(void __iomem *sar) in armada_39x_get_cpu_freq() argument
72 cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) & in armada_39x_get_cpu_freq()
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
110 static u32 __init armada_39x_refclk_ratio(void __iomem *sar) in armada_39x_refclk_ratio() argument
112 if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ) in armada_39x_refclk_ratio()
Ddove.c87 static u32 __init dove_get_tclk_freq(void __iomem *sar) in dove_get_tclk_freq() argument
89 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) & in dove_get_tclk_freq()
106 static u32 __init dove_get_cpu_freq(void __iomem *sar) in dove_get_cpu_freq() argument
108 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) & in dove_get_cpu_freq()
126 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument
131 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) & in dove_get_clk_ratio()
139 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) & in dove_get_clk_ratio()
Dcommon.h28 u32 (*get_tclk_freq)(void __iomem *sar);
29 u32 (*get_cpu_freq)(void __iomem *sar);
30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
31 u32 (*get_refclk_freq)(void __iomem *sar);
32 bool (*is_sscg_enabled)(void __iomem *sar);
Darmada-xp.c48 static u32 __init axp_get_tclk_freq(void __iomem *sar) in axp_get_tclk_freq() argument
68 static u32 __init axp_get_cpu_freq(void __iomem *sar) in axp_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
79 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) & in axp_get_cpu_freq()
124 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
126 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
132 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) & in axp_get_clk_ratio()
Darmada-375.c50 static u32 __init armada_375_get_tclk_freq(void __iomem *sar) in armada_375_get_tclk_freq() argument
54 tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) & in armada_375_get_tclk_freq()
71 static u32 __init armada_375_get_cpu_freq(void __iomem *sar) in armada_375_get_cpu_freq() argument
75 cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_cpu_freq()
115 void __iomem *sar, int id, int *mult, int *div) in armada_375_get_clk_ratio() argument
117 u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) & in armada_375_get_clk_ratio()
Darmada-38x.c37 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) in armada_38x_get_tclk_freq() argument
41 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) & in armada_38x_get_tclk_freq()
54 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) in armada_38x_get_cpu_freq() argument
58 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_cpu_freq()
99 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
101 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) & in armada_38x_get_clk_ratio()
Dmv98dx3236.c44 static u32 __init mv98dx3236_get_tclk_freq(void __iomem *sar) in mv98dx3236_get_tclk_freq() argument
68 static u32 __init mv98dx3236_get_cpu_freq(void __iomem *sar) in mv98dx3236_get_cpu_freq() argument
73 cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_cpu_freq()
118 void __iomem *sar, int id, int *mult, int *div) in mv98dx3236_get_clk_ratio() argument
120 u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) & in mv98dx3236_get_clk_ratio()
/linux-6.1.9/drivers/net/wireless/realtek/rtw88/
Dsar.c12 const struct rtw_sar *sar = &hal->sar; in rtw_query_sar() local
14 switch (sar->src) { in rtw_query_sar()
16 rtw_warn(rtwdev, "unknown SAR source: %d\n", sar->src); in rtw_query_sar()
21 return sar->cfg[arg->path][arg->rs].common[arg->sar_band]; in rtw_query_sar()
28 struct rtw_sar *sar = &hal->sar; in rtw_apply_sar() local
30 if (sar->src != RTW_SAR_SOURCE_NONE && new->src != sar->src) { in rtw_apply_sar()
31 rtw_warn(rtwdev, "SAR source: %d is in use\n", sar->src); in rtw_apply_sar()
35 *sar = *new; in rtw_apply_sar()
41 static s8 rtw_sar_to_phy(struct rtw_dev *rtwdev, u8 fct, s32 sar, in rtw_sar_to_phy() argument
50 tmp = fct > txgi ? sar >> (fct - txgi) : sar << (txgi - fct); in rtw_sar_to_phy()
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/linux-6.1.9/Documentation/devicetree/bindings/sound/
Dnau8824.txt29 - nuvoton,sar-threshold-num: Number of buttons supported
30 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
32 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
35 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
37 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
47 - nuvoton,sar-compare-time: SAR compare time
53 - nuvoton,sar-sampling-time: SAR sampling time
80 nuvoton,sar-threshold-num = <4>;
81 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
82 nuvoton,sar-hysteresis = <0>;
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Dnau8825.txt33 - nuvoton,sar-threshold-num: Number of buttons supported
34 …- nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons …
36 …igured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - butto…
39 - nuvoton,sar-hysteresis: Button impedance measurement hysteresis.
41 - nuvoton,sar-voltage: Reference voltage for button impedance measurement.
51 - nuvoton,sar-compare-time: SAR compare time
57 - nuvoton,sar-sampling-time: SAR sampling time
95 nuvoton,sar-threshold-num = <4>;
96 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
97 nuvoton,sar-hysteresis = <1>;
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/linux-6.1.9/drivers/net/wireless/realtek/rtw89/
Dsar.c83 struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common; in rtw89_query_sar_config_common()
143 _d->sar._cfg_name = *(_cfg_data); \
144 _d->sar.src = _s; \
162 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_query_sar()
185 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_print_sar()
216 const struct rtw89_sar_cfg_common *sar) in rtw89_apply_sar_common() argument
223 src = rtwdev->sar.src; in rtw89_apply_sar_common()
230 rtw89_sar_set_src(rtwdev, RTW89_SAR_SOURCE_COMMON, cfg_common, sar); in rtw89_apply_sar_common()
261 const struct cfg80211_sar_specs *sar) in rtw89_ops_set_sar_specs() argument
271 if (sar->type != NL80211_SAR_TYPE_POWER) in rtw89_ops_set_sar_specs()
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/linux-6.1.9/arch/sh/drivers/dma/
Ddma-g2.c97 if (chan->sar & 31) { in g2_xfer_dma()
98 printk("g2dma: unaligned source 0x%lx\n", chan->sar); in g2_xfer_dma()
117 flush_icache_range((unsigned long)chan->sar, chan->count); in g2_xfer_dma()
122 g2_dma->channel[chan_nr].root_addr = chan->sar & 0x1fffffe0; in g2_xfer_dma()
/linux-6.1.9/arch/parisc/include/uapi/asm/
Dptrace.h35 unsigned long sar; /* CR11 */ member
56 unsigned long sar; /* CR11 */ member
/linux-6.1.9/arch/parisc/kernel/
Dkgdb.c81 gr->sar = regs->sar; in pt_regs_to_gdb_regs()
112 regs->sar = gr->sar; in gdb_regs_to_pt_regs()
Dperf_asm.S154 shrpd ret0,%r0,%sar,%r1
178 shrpd ret0,%r0,%sar,%r1
274 shrpd ret0,%r0,%sar,%r1
286 shrpd ret0,%r0,%sar,%r1
322 shrpd ret0,%r0,%sar,%r1
358 shrpd ret0,%r0,%sar,%r1
370 shrpd ret0,%r0,%sar,%r1
466 shrpd ret0,%r0,%sar,%r1
478 shrpd ret0,%r0,%sar,%r1
514 shrpd ret0,%r0,%sar,%r1
Dsignal32.c100 regs->sar = ((u64)compat_regt << 32) | (u64)compat_reg; in restore_sigcontext32()
102 DBG(2,"restore_sigcontext32: sar is %#lx\n", regs->sar); in restore_sigcontext32()
238 compat_reg = (compat_uint_t)(regs->sar); in setup_sigcontext32()
242 compat_reg = (compat_uint_t)(regs->sar >> 32); in setup_sigcontext32()
Dtoc.c35 regs->sar = (unsigned long)toc->cr[11]; in toc20_to_pt_regs()
58 regs->sar = toc->cr[11]; in toc11_to_pt_regs()
/linux-6.1.9/arch/parisc/lib/
Dlusercopy.S295 shrpw a2, a3, %sar, t0
301 shrpw a3, a0, %sar, t0
307 shrpw a0, a1, %sar, t0
313 shrpw a1, a2, %sar, t0
320 shrpw a2, a3, %sar, t0
/linux-6.1.9/drivers/net/wireless/mediatek/mt76/mt76x0/
Dmain.c35 const struct cfg80211_sar_specs *sar) in mt76x0_set_sar_specs() argument
45 err = mt76_init_sar_power(hw, sar); in mt76x0_set_sar_specs()
/linux-6.1.9/drivers/dma/dw-edma/
Ddw-edma-v0-core.c329 SET_LL_64(&lli[i].sar.reg, child->sar); in dw_edma_v0_core_write_chunk()
331 SET_LL_32(&lli[i].sar.lsb, lower_32_bits(child->sar)); in dw_edma_v0_core_write_chunk()
332 SET_LL_32(&lli[i].sar.msb, upper_32_bits(child->sar)); in dw_edma_v0_core_write_chunk()
/linux-6.1.9/arch/xtensa/kernel/
Dptrace.c50 .sar = regs->sar, in gpr_get()
90 regs->sar = newregs.sar; in gpr_set()
322 tmp = regs->sar; in ptrace_peekusr()
/linux-6.1.9/drivers/dma/
Didma64.c234 u64 sar, dar; in idma64_hw_desc_fill() local
240 sar = hw->phys; in idma64_hw_desc_fill()
244 src_width = __ffs(sar | hw->len | 4); in idma64_hw_desc_fill()
247 sar = config->src_addr; in idma64_hw_desc_fill()
255 lli->sar = sar; in idma64_hw_desc_fill()

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