Searched refs:rsvd_check (Results 1 – 3 of 3) sorted by relevance
/linux-6.1.9/arch/x86/kvm/mmu/ |
D | spte.h | 318 static inline u64 get_rsvd_bits(struct rsvd_bits_validate *rsvd_check, u64 pte, in get_rsvd_bits() argument 323 return rsvd_check->rsvd_bits_mask[bit7][level-1]; in get_rsvd_bits() 326 static inline bool __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, in __is_rsvd_bits_set() argument 329 return pte & get_rsvd_bits(rsvd_check, pte, level); in __is_rsvd_bits_set() 332 static inline bool __is_bad_mt_xwr(struct rsvd_bits_validate *rsvd_check, in __is_bad_mt_xwr() argument 335 return rsvd_check->bad_mt_xwr & BIT_ULL(pte & 0x3f); in __is_bad_mt_xwr() 338 static __always_inline bool is_rsvd_spte(struct rsvd_bits_validate *rsvd_check, in is_rsvd_spte() argument 341 return __is_bad_mt_xwr(rsvd_check, spte) || in is_rsvd_spte() 342 __is_rsvd_bits_set(rsvd_check, spte, level); in is_rsvd_spte()
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D | mmu.c | 3986 struct rsvd_bits_validate *rsvd_check; in get_mmio_spte() local 4015 rsvd_check = &vcpu->arch.mmu->shadow_zero_check; in get_mmio_spte() 4018 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level); in get_mmio_spte() 4026 get_rsvd_bits(rsvd_check, sptes[level], level)); in get_mmio_spte() 4526 __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check, in __reset_rsvds_bits_mask() argument 4534 rsvd_check->bad_mt_xwr = 0; in __reset_rsvds_bits_mask() 4558 rsvd_check->rsvd_bits_mask[0][1] = 0; in __reset_rsvds_bits_mask() 4559 rsvd_check->rsvd_bits_mask[0][0] = 0; in __reset_rsvds_bits_mask() 4560 rsvd_check->rsvd_bits_mask[1][0] = in __reset_rsvds_bits_mask() 4561 rsvd_check->rsvd_bits_mask[0][0]; in __reset_rsvds_bits_mask() [all …]
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D | paging_tmpl.h | 136 static bool FNAME(is_bad_mt_xwr)(struct rsvd_bits_validate *rsvd_check, u64 gpte) in FNAME() 141 return __is_bad_mt_xwr(rsvd_check, gpte); in FNAME()
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