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Searched refs:regRLC_SPM_MC_CNTL (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c4994 reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL); in gfx_v11_0_update_spm_vmid()
5004 WREG32_SOC15_NO_KIQ(GC, 0, regRLC_SPM_MC_CNTL, data); in gfx_v11_0_update_spm_vmid()
5006 WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data); in gfx_v11_0_update_spm_vmid()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h5046 #define regRLC_SPM_MC_CNTL … macro
Dgc_11_0_0_offset.h10566 #define regRLC_SPM_MC_CNTL … macro
Dgc_11_0_3_offset.h11190 #define regRLC_SPM_MC_CNTL … macro