Home
last modified time | relevance | path

Searched refs:regPWRSEQ0_PWRSEQ_SPARE (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_3_1_4_offset.h7178 #define regPWRSEQ0_PWRSEQ_SPARE … macro
Ddpcs_4_2_0_offset.h96 #define regPWRSEQ0_PWRSEQ_SPARE … macro
Ddpcs_4_2_2_offset.h83 #define regPWRSEQ0_PWRSEQ_SPARE … macro
Ddpcs_4_2_3_offset.h100 #define regPWRSEQ0_PWRSEQ_SPARE … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h12431 #define regPWRSEQ0_PWRSEQ_SPARE … macro
Ddcn_3_1_4_offset.h11544 #define regPWRSEQ0_PWRSEQ_SPARE … macro
Ddcn_3_1_5_offset.h12296 #define regPWRSEQ0_PWRSEQ_SPARE … macro
Ddcn_3_1_6_offset.h13027 #define regPWRSEQ0_PWRSEQ_SPARE … macro