Home
last modified time | relevance | path

Searched refs:regOTG1_OTG_V_TOTAL_MID (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h8983 #define regOTG1_OTG_V_TOTAL_MID … macro
Ddcn_3_1_4_offset.h8040 #define regOTG1_OTG_V_TOTAL_MID … macro
Ddcn_3_1_5_offset.h8744 #define regOTG1_OTG_V_TOTAL_MID … macro
Ddcn_3_2_0_offset.h8115 #define regOTG1_OTG_V_TOTAL_MID … macro
Ddcn_3_2_1_offset.h8114 #define regOTG1_OTG_V_TOTAL_MID … macro
Ddcn_3_1_6_offset.h9207 #define regOTG1_OTG_V_TOTAL_MID … macro