Home
last modified time | relevance | path

Searched refs:regMPCC1_MPCC_TOP_GAIN_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h6498 #define regMPCC1_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_1_4_offset.h13263 #define regMPCC1_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_1_5_offset.h6257 #define regMPCC1_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_2_0_offset.h4802 #define regMPCC1_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_2_1_offset.h4801 #define regMPCC1_MPCC_TOP_GAIN_BASE_IDX … macro
Ddcn_3_1_6_offset.h6718 #define regMPCC1_MPCC_TOP_GAIN_BASE_IDX … macro