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Searched refs:regMPCC0_MPCC_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h6459 #define regMPCC0_MPCC_CONTROL … macro
Ddcn_3_1_4_offset.h13224 #define regMPCC0_MPCC_CONTROL … macro
Ddcn_3_1_5_offset.h6218 #define regMPCC0_MPCC_CONTROL … macro
Ddcn_3_2_0_offset.h4761 #define regMPCC0_MPCC_CONTROL … macro
Ddcn_3_2_1_offset.h4760 #define regMPCC0_MPCC_CONTROL … macro
Ddcn_3_1_6_offset.h6679 #define regMPCC0_MPCC_CONTROL … macro