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Searched refs:regMP0_SMN_C2PMSG_81 (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dpsp_v13_0_4.c72 sol_reg = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81); in psp_v13_0_4_is_sos_alive()
195 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_81), in psp_v13_0_4_bootloader_load_sos()
196 RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81), in psp_v13_0_4_bootloader_load_sos()
Dpsp_v13_0.c138 sol_reg = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81); in psp_v13_0_is_sos_alive()
267 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_81), in psp_v13_0_bootloader_load_sos()
268 RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81), in psp_v13_0_bootloader_load_sos()
Dsoc21.c445 sol_reg = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81); in soc21_need_reset_on_init()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_13_0_2_offset.h129 #define regMP0_SMN_C2PMSG_81 macro
Dmp_13_0_4_offset.h129 #define regMP0_SMN_C2PMSG_81 macro
Dmp_13_0_8_offset.h130 #define regMP0_SMN_C2PMSG_81 macro
Dmp_13_0_0_offset.h127 #define regMP0_SMN_C2PMSG_81 macro
Dmp_13_0_5_offset.h129 #define regMP0_SMN_C2PMSG_81 macro
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu13/
Daldebaran_ppt.c2003 val = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81); in aldebaran_is_mode1_reset_supported()