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Searched refs:regMP0_SMN_C2PMSG_102 (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dpsp_v13_0_4.c274 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v13_0_4_ring_create()
348 data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102); in psp_v13_0_4_ring_get_wptr()
360 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, value); in psp_v13_0_4_ring_set_wptr()
Dpsp_v13_0.c346 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v13_0_ring_create()
420 data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102); in psp_v13_0_ring_get_wptr()
432 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, value); in psp_v13_0_ring_set_wptr()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_13_0_2_offset.h171 #define regMP0_SMN_C2PMSG_102 macro
Dmp_13_0_4_offset.h171 #define regMP0_SMN_C2PMSG_102 macro
Dmp_13_0_8_offset.h172 #define regMP0_SMN_C2PMSG_102 macro
Dmp_13_0_0_offset.h169 #define regMP0_SMN_C2PMSG_102 macro
Dmp_13_0_5_offset.h171 #define regMP0_SMN_C2PMSG_102 macro