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Searched refs:regMC_VM_CACHEABLE_DRAM_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_7_offset.h5101 #define regMC_VM_CACHEABLE_DRAM_CNTL_BASE_IDX … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h7367 #define regMC_VM_CACHEABLE_DRAM_CNTL_BASE_IDX … macro