Home
last modified time | relevance | path

Searched refs:regMCIF_WB_BUFMGR_VCE_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h1459 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
Ddcn_3_1_4_offset.h2378 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
Ddcn_3_1_5_offset.h1222 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
Ddcn_3_2_0_offset.h1100 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
Ddcn_3_2_1_offset.h1100 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
Ddcn_3_1_6_offset.h1675 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro