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Searched refs:regDTBCLK_DTO0_PHASE_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h412 #define regDTBCLK_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_1_4_offset.h1504 #define regDTBCLK_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_1_5_offset.h201 #define regDTBCLK_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_2_0_offset.h207 #define regDTBCLK_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_2_1_offset.h207 #define regDTBCLK_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_1_6_offset.h614 #define regDTBCLK_DTO0_PHASE_BASE_IDX … macro