Home
last modified time | relevance | path

Searched refs:regDSCL3_DSCL_MEM_PWR_CTRL (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h5899 #define regDSCL3_DSCL_MEM_PWR_CTRL macro
Ddcn_3_1_4_offset.h6812 #define regDSCL3_DSCL_MEM_PWR_CTRL macro
Ddcn_3_1_5_offset.h5658 #define regDSCL3_DSCL_MEM_PWR_CTRL macro
Ddcn_3_2_0_offset.h4507 #define regDSCL3_DSCL_MEM_PWR_CTRL macro
Ddcn_3_2_1_offset.h4506 #define regDSCL3_DSCL_MEM_PWR_CTRL macro
Ddcn_3_1_6_offset.h6119 #define regDSCL3_DSCL_MEM_PWR_CTRL macro