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Searched refs:regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h12512 #define regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX … macro
Ddcn_3_1_4_offset.h11641 #define regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX … macro
Ddcn_3_1_5_offset.h12377 #define regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX … macro
Ddcn_3_2_0_offset.h11736 #define regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX … macro
Ddcn_3_2_1_offset.h11745 #define regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX … macro
Ddcn_3_1_6_offset.h13108 #define regDSCC0_DSCC_PPS_CONFIG16_BASE_IDX … macro