Home
last modified time | relevance | path

Searched refs:regCP_RB1_WPTR_HI (Results 1 – 4 of 4) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h399 #define regCP_RB1_WPTR_HI macro
Dgc_11_0_0_offset.h4172 #define regCP_RB1_WPTR_HI macro
Dgc_11_0_3_offset.h4382 #define regCP_RB1_WPTR_HI macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c3227 WREG32_SOC15(GC, 0, regCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); in gfx_v11_0_cp_gfx_resume()