Searched refs:regCP_MEC_DC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v11_0.c | 2368 tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL); in gfx_v11_0_config_mec_cache_rs64()
2370 WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp); in gfx_v11_0_config_mec_cache_rs64()
2374 tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL); in gfx_v11_0_config_mec_cache_rs64()
3452 tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL); in gfx_v11_0_cp_compute_load_microcode_rs64()
3454 WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp); in gfx_v11_0_cp_compute_load_microcode_rs64()
3458 tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL); in gfx_v11_0_cp_compute_load_microcode_rs64()
|
| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_11_0_0_offset.h | 7766 #define regCP_MEC_DC_OP_CNTL … macro
|
| D | gc_11_0_3_offset.h | 8074 #define regCP_MEC_DC_OP_CNTL … macro
|