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Searched refs:regCNVC_CFG3_PRE_CSC_C11_C12 (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_2_offset.h5793 #define regCNVC_CFG3_PRE_CSC_C11_C12 macro
Ddcn_3_1_4_offset.h6706 #define regCNVC_CFG3_PRE_CSC_C11_C12 macro
Ddcn_3_1_5_offset.h5552 #define regCNVC_CFG3_PRE_CSC_C11_C12 macro
Ddcn_3_2_0_offset.h4401 #define regCNVC_CFG3_PRE_CSC_C11_C12 macro
Ddcn_3_2_1_offset.h4400 #define regCNVC_CFG3_PRE_CSC_C11_C12 macro
Ddcn_3_1_6_offset.h6013 #define regCNVC_CFG3_PRE_CSC_C11_C12 macro