Searched refs:rFPGA0_XA_HSSIParameter1 (Results 1 – 10 of 10) sorted by relevance
10 #define rFPGA0_XA_HSSIParameter1 0x820 macro
608 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; in rtl8192_InitBBRFRegDef()
150 RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8)); in phy_RFSerialRead()376 pHalData->PHYRegDef.rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */ in phy_InitBBRFRegisterDefinition()
551 rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); in _PHY_PIModeSwitch()673 …dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(adapt, rFPGA0_XA_HSSIParameter1,… in phy_IQCalibrate_8188E()
53 #define rFPGA0_XA_HSSIParameter1 0x820 macro
399 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; in _rtl92e_init_bb_rf_reg_def()
92 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
64 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
102 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ macro
133 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()