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Searched refs:qos_level_low_wm (Results 1 – 16 of 16) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer_debug.c157 …(s->qos_level_low_wm * frac) / ref_clk_mhz / frac, (s->qos_level_low_wm * frac) / ref_clk_mhz % fr… in dcn10_get_hubp_states()
177 …(s->qos_level_low_wm * frac) / ref_clk_mhz / frac, (s->qos_level_low_wm * frac) / ref_clk_mhz % fr… in dcn10_get_hubp_states()
311 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_get_ttu_states()
Ddcn10_hubp.c652 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm, in hubp1_program_deadline()
991 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm, in hubp1_read_state_common()
1055 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm, in hubp1_read_state_common()
Ddcn10_hubp.h687 uint32_t qos_level_low_wm; member
Ddcn10_hw_sequencer.c197 DTN_INFO_MICRO_SEC(s->qos_level_low_wm); in dcn10_log_hubp_states()
270 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_log_hubp_states()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c477 QoS_LEVEL_LOW_WM, &ttu_attr.qos_level_low_wm, in hubp21_validate_dml_output()
480 if (ttu_attr.qos_level_low_wm != dml_ttu_attr->qos_level_low_wm) in hubp21_validate_dml_output()
482 dml_ttu_attr->qos_level_low_wm, ttu_attr.qos_level_low_wm); in hubp21_validate_dml_output()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c145 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm, in hubp2_program_deadline()
1216 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm, in hubp2_read_state_common()
1280 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm, in hubp2_read_state_common()
1555 QoS_LEVEL_LOW_WM, &ttu_attr.qos_level_low_wm, in hubp2_validate_dml_output()
1558 if (ttu_attr.qos_level_low_wm != dml_ttu_attr->qos_level_low_wm) in hubp2_validate_dml_output()
1560 dml_ttu_attr->qos_level_low_wm, ttu_attr.qos_level_low_wm); in hubp2_validate_dml_output()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c334 ttu_regs->qos_level_low_wm); in print__ttu_regs_st()
Ddisplay_mode_structs.h673 unsigned int qos_level_low_wm; member
Ddml1_display_rq_dlg_calc.c1909 disp_ttu_regs->qos_level_low_wm = 0; in dml1_rq_dlg_get_dlg_params()
1910 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml1_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_rq_dlg_calc_32.c541 ttu_regs->qos_level_low_wm = 0; in dml32_rq_dlg_get_dlg_reg()
607 ASSERT(ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml32_rq_dlg_get_dlg_reg()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c1528 disp_ttu_regs->qos_level_low_wm = 0; in dml20_rq_dlg_get_dlg_params()
1529 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml20_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20v2.c1529 disp_ttu_regs->qos_level_low_wm = 0; in dml20v2_rq_dlg_get_dlg_params()
1530 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml20v2_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c1636 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1637 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c1721 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1722 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c1550 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1551 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c1665 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1666 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()