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Searched refs:priv_reg_irq (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfx.h321 struct amdgpu_irq_src priv_reg_irq; member
Dgfx_v7_0.c4231 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v7_0_late_init()
4446 &adev->gfx.priv_reg_irq); in gfx_v7_0_sw_init()
4564 amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v7_0_hw_fini()
5110 adev->gfx.priv_reg_irq.num_types = 1; in gfx_v7_0_set_irq_funcs()
5111 adev->gfx.priv_reg_irq.funcs = &gfx_v7_0_priv_reg_irq_funcs; in gfx_v7_0_set_irq_funcs()
Dgfx_v6_0.c3065 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 184, &adev->gfx.priv_reg_irq); in gfx_v6_0_sw_init()
3557 adev->gfx.priv_reg_irq.num_types = 1; in gfx_v6_0_set_irq_funcs()
3558 adev->gfx.priv_reg_irq.funcs = &gfx_v6_0_priv_reg_irq_funcs; in gfx_v6_0_set_irq_funcs()
Dgfx_v11_0.c1329 &adev->gfx.priv_reg_irq); in gfx_v11_0_sw_init()
4410 amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v11_0_hw_fini()
4696 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v11_0_late_init()
6224 adev->gfx.priv_reg_irq.num_types = 1; in gfx_v11_0_set_irq_funcs()
6225 adev->gfx.priv_reg_irq.funcs = &gfx_v11_0_priv_reg_irq_funcs; in gfx_v11_0_set_irq_funcs()
Dgfx_v9_0.c2135 &adev->gfx.priv_reg_irq); in gfx_v9_0_sw_init()
3801 amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v9_0_hw_fini()
4600 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v9_0_late_init()
6825 adev->gfx.priv_reg_irq.num_types = 1; in gfx_v9_0_set_irq_funcs()
6826 adev->gfx.priv_reg_irq.funcs = &gfx_v9_0_priv_reg_irq_funcs; in gfx_v9_0_set_irq_funcs()
Dgfx_v8_0.c1961 &adev->gfx.priv_reg_irq); in gfx_v8_0_sw_init()
4916 amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v8_0_hw_fini()
5308 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v8_0_late_init()
7068 adev->gfx.priv_reg_irq.num_types = 1; in gfx_v8_0_set_irq_funcs()
7069 adev->gfx.priv_reg_irq.funcs = &gfx_v8_0_priv_reg_irq_funcs; in gfx_v8_0_set_irq_funcs()
Dgfx_v10_0.c4643 &adev->gfx.priv_reg_irq); in gfx_v10_0_sw_init()
7350 amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v10_0_hw_fini()
7639 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v10_0_late_init()
9496 adev->gfx.priv_reg_irq.num_types = 1; in gfx_v10_0_set_irq_funcs()
9497 adev->gfx.priv_reg_irq.funcs = &gfx_v10_0_priv_reg_irq_funcs; in gfx_v10_0_set_irq_funcs()