| /linux-6.1.9/drivers/gpu/drm/mcde/ |
| D | mcde_clk_div.c | 45 unsigned long *prate, bool set_parent) in mcde_clk_div_choose_div() argument
59 this_prate = *prate; in mcde_clk_div_choose_div()
70 *prate = best_prate; in mcde_clk_div_choose_div()
75 unsigned long *prate) in mcde_clk_div_round_rate() argument
77 int div = mcde_clk_div_choose_div(hw, rate, prate, true); in mcde_clk_div_round_rate()
79 return DIV_ROUND_UP_ULL(*prate, div); in mcde_clk_div_round_rate()
83 unsigned long prate) in mcde_clk_div_recalc_rate() argument
96 return DIV_ROUND_UP_ULL(prate, 2); in mcde_clk_div_recalc_rate()
100 return prate; in mcde_clk_div_recalc_rate()
106 return DIV_ROUND_UP_ULL(prate, div); in mcde_clk_div_recalc_rate()
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| /linux-6.1.9/drivers/clk/meson/ |
| D | sclk-div.c | 42 unsigned long prate, int maxdiv) in sclk_div_getdiv() argument
44 int div = DIV_ROUND_CLOSEST_ULL((u64)prate, rate); in sclk_div_getdiv()
50 unsigned long *prate, in sclk_div_bestdiv() argument
64 return sclk_div_getdiv(hw, rate, *prate, maxdiv); in sclk_div_bestdiv()
78 if (rate * i == *prate) in sclk_div_bestdiv()
94 *prate = best_parent; in sclk_div_bestdiv()
100 unsigned long *prate) in sclk_div_round_rate() argument
106 div = sclk_div_bestdiv(hw, rate, prate, sclk); in sclk_div_round_rate()
108 return DIV_ROUND_UP_ULL((u64)*prate, div); in sclk_div_round_rate()
167 unsigned long prate) in sclk_div_set_rate() argument
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| D | clk-cpu-dyndiv.c | 20 unsigned long prate) in meson_clk_cpu_dyndiv_recalc_rate() argument
25 return divider_recalc_rate(hw, prate, in meson_clk_cpu_dyndiv_recalc_rate()
32 unsigned long *prate) in meson_clk_cpu_dyndiv_round_rate() argument
37 return divider_round_rate(hw, rate, prate, NULL, data->div.width, 0); in meson_clk_cpu_dyndiv_round_rate()
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| /linux-6.1.9/drivers/clk/spear/ |
| D | clk-frac-synth.c | 41 static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate, in frac_calc_rate() argument
47 prate /= 10000; in frac_calc_rate()
48 prate <<= 14; in frac_calc_rate()
49 prate /= (2 * rtbl[index].div); in frac_calc_rate()
50 prate *= 10000; in frac_calc_rate()
52 return prate; in frac_calc_rate()
56 unsigned long *prate) in clk_frac_round_rate() argument
61 return clk_round_rate_index(hw, drate, *prate, frac_calc_rate, in clk_frac_round_rate()
93 unsigned long prate) in clk_frac_set_rate() argument
100 clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac->rtbl_cnt, in clk_frac_set_rate()
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| D | clk-vco-pll.c | 67 unsigned long prate, int index, unsigned long *pll_rate) in pll_calc_rate() argument
69 unsigned long rate = prate; in pll_calc_rate()
82 unsigned long *prate, int *index) in clk_pll_round_rate_index() argument
89 if (!prate) { in clk_pll_round_rate_index()
96 vco_prev_rate = *prate; in clk_pll_round_rate_index()
97 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, in clk_pll_round_rate_index()
103 *prate = vco_prev_rate; in clk_pll_round_rate_index()
114 unsigned long *prate) in clk_pll_round_rate() argument
118 return clk_pll_round_rate_index(hw, drate, prate, &unused); in clk_pll_round_rate()
142 unsigned long prate) in clk_pll_set_rate() argument
[all …]
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| D | clk-gpt-synth.c | 31 static unsigned long gpt_calc_rate(struct clk_hw *hw, unsigned long prate, in gpt_calc_rate() argument
37 prate /= ((1 << (rtbl[index].nscale + 1)) * (rtbl[index].mscale + 1)); in gpt_calc_rate()
39 return prate; in gpt_calc_rate()
43 unsigned long *prate) in clk_gpt_round_rate() argument
48 return clk_round_rate_index(hw, drate, *prate, gpt_calc_rate, in clk_gpt_round_rate()
78 unsigned long prate) in clk_gpt_set_rate() argument
85 clk_round_rate_index(hw, drate, prate, gpt_calc_rate, gpt->rtbl_cnt, in clk_gpt_set_rate()
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| D | clk-aux-synth.c | 41 static unsigned long aux_calc_rate(struct clk_hw *hw, unsigned long prate, in aux_calc_rate() argument
48 return (((prate / 10000) * rtbl[index].xscale) / in aux_calc_rate()
53 unsigned long *prate) in clk_aux_round_rate() argument
58 return clk_round_rate_index(hw, drate, *prate, aux_calc_rate, in clk_aux_round_rate()
97 unsigned long prate) in clk_aux_set_rate() argument
104 clk_round_rate_index(hw, drate, prate, aux_calc_rate, aux->rtbl_cnt, in clk_aux_set_rate()
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| /linux-6.1.9/drivers/clk/imx/ |
| D | clk-pll14xx.c | 105 int sdiv, int kdiv, unsigned long prate) in pll14xx_calc_rate() argument
107 u64 fvco = prate; in pll14xx_calc_rate()
119 unsigned long rate, unsigned long prate) in pll1443x_calc_kdiv() argument
124 kdiv = ((rate * ((pdiv * 65536) << sdiv) + prate / 2) / prate) - (mdiv * 65536); in pll1443x_calc_kdiv()
130 unsigned long prate, struct imx_pll14xx_rate_table *t) in imx_pll14xx_calc_settings() argument
153 clk_hw_get_name(&pll->hw), prate, rate); in imx_pll14xx_calc_settings()
169 rate_min = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MIN, prate); in imx_pll14xx_calc_settings()
170 rate_max = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MAX, prate); in imx_pll14xx_calc_settings()
173 kdiv = pll1443x_calc_kdiv(mdiv, pdiv, sdiv, rate, prate); in imx_pll14xx_calc_settings()
175 clk_hw_get_name(&pll->hw), prate, rate, in imx_pll14xx_calc_settings()
[all …]
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| D | clk-pllv3.c | 120 unsigned long *prate) in clk_pllv3_round_rate() argument
122 unsigned long parent_rate = *prate; in clk_pllv3_round_rate()
168 unsigned long *prate) in clk_pllv3_sys_round_rate() argument
170 unsigned long parent_rate = *prate; in clk_pllv3_sys_round_rate()
229 unsigned long *prate) in clk_pllv3_av_round_rate() argument
231 unsigned long parent_rate = *prate; in clk_pllv3_av_round_rate()
358 unsigned long *prate) in clk_pllv3_vf610_round_rate() argument
360 struct clk_pllv3_vf610_mf mf = clk_pllv3_vf610_rate_to_mf(*prate, rate); in clk_pllv3_vf610_round_rate()
362 return clk_pllv3_vf610_mf_to_rate(*prate, mf); in clk_pllv3_vf610_round_rate()
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| /linux-6.1.9/drivers/clk/renesas/ |
| D | rcar-gen3-cpg.c | 70 unsigned long prate; in cpg_pll_clk_determine_rate() local
72 prate = req->best_parent_rate * pll_clk->fixed_mult; in cpg_pll_clk_determine_rate()
73 min_mult = max(div64_ul(req->min_rate, prate), 1ULL); in cpg_pll_clk_determine_rate()
74 max_mult = min(div64_ul(req->max_rate, prate), 128ULL); in cpg_pll_clk_determine_rate()
78 mult = DIV_ROUND_CLOSEST_ULL(req->rate, prate); in cpg_pll_clk_determine_rate()
81 req->rate = prate * mult; in cpg_pll_clk_determine_rate()
194 unsigned long rate, prate; in cpg_z_clk_determine_rate() local
199 prate = zclk->max_rate; in cpg_z_clk_determine_rate()
202 prate = rate; in cpg_z_clk_determine_rate()
205 prate * zclk->fixed_div); in cpg_z_clk_determine_rate()
[all …]
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| D | rcar-gen4-cpg.c | 67 unsigned long rate, prate; in cpg_z_clk_determine_rate() local
72 prate = zclk->max_rate; in cpg_z_clk_determine_rate()
75 prate = rate; in cpg_z_clk_determine_rate()
78 prate * zclk->fixed_div); in cpg_z_clk_determine_rate()
80 prate = req->best_parent_rate / zclk->fixed_div; in cpg_z_clk_determine_rate()
81 min_mult = max(div64_ul(req->min_rate * 32ULL, prate), 1ULL); in cpg_z_clk_determine_rate()
82 max_mult = min(div64_ul(req->max_rate * 32ULL, prate), 32ULL); in cpg_z_clk_determine_rate()
86 mult = DIV_ROUND_CLOSEST_ULL(rate * 32ULL, prate); in cpg_z_clk_determine_rate()
89 req->rate = DIV_ROUND_CLOSEST_ULL((u64)prate * mult, 32); in cpg_z_clk_determine_rate()
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| D | clk-div6.c | 106 unsigned long prate, calc_rate, diff, best_rate, best_prate; in cpg_div6_clock_determine_rate() local
117 prate = clk_hw_get_rate(parent); in cpg_div6_clock_determine_rate()
118 if (!prate) in cpg_div6_clock_determine_rate()
121 min_div = max(DIV_ROUND_UP(prate, req->max_rate), 1UL); in cpg_div6_clock_determine_rate()
122 max_div = req->min_rate ? min(prate / req->min_rate, 64UL) : 64; in cpg_div6_clock_determine_rate()
126 div = cpg_div6_clock_calc_div(req->rate, prate); in cpg_div6_clock_determine_rate()
128 calc_rate = prate / div; in cpg_div6_clock_determine_rate()
134 best_prate = prate; in cpg_div6_clock_determine_rate()
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| /linux-6.1.9/drivers/clk/qcom/ |
| D | clk-alpha-pll.c | 508 alpha_pll_calc_rate(u64 prate, u32 l, u32 a, u32 alpha_width) in alpha_pll_calc_rate() argument
510 return (prate * l) + ((prate * a) >> ALPHA_SHIFT(alpha_width)); in alpha_pll_calc_rate()
514 alpha_pll_round_rate(unsigned long rate, unsigned long prate, u32 *l, u64 *a, in alpha_pll_round_rate() argument
521 remainder = do_div(quotient, prate); in alpha_pll_round_rate()
532 remainder = do_div(quotient, prate); in alpha_pll_round_rate()
538 return alpha_pll_calc_rate(prate, *l, *a, alpha_width); in alpha_pll_round_rate()
558 u64 a = 0, prate = parent_rate; in clk_alpha_pll_recalc_rate() local
579 return alpha_pll_calc_rate(prate, l, a, alpha_width); in clk_alpha_pll_recalc_rate()
637 unsigned long prate, in __clk_alpha_pll_set_rate() argument
645 rate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width); in __clk_alpha_pll_set_rate()
[all …]
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| D | clk-regmap-divider.c | 19 unsigned long *prate) in div_round_ro_rate() argument
29 return divider_ro_round_rate(hw, rate, prate, NULL, divider->width, in div_round_ro_rate()
34 unsigned long *prate) in div_round_rate() argument
38 return divider_round_rate(hw, rate, prate, NULL, divider->width, in div_round_rate()
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| D | clk-regmap-mux-div.c | 125 unsigned long prate, u32 src) in __mux_div_set_rate_and_parent() argument
187 unsigned long rate, unsigned long prate) in mux_div_set_rate() argument
191 return __mux_div_set_rate_and_parent(hw, rate, prate, md->src); in mux_div_set_rate()
195 unsigned long prate, u8 index) in mux_div_set_rate_and_parent() argument
199 return __mux_div_set_rate_and_parent(hw, rate, prate, in mux_div_set_rate_and_parent()
203 static unsigned long mux_div_recalc_rate(struct clk_hw *hw, unsigned long prate) in mux_div_recalc_rate() argument
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| /linux-6.1.9/drivers/rtc/ |
| D | rtc-ac100.c | 120 unsigned long prate) in ac100_clkout_recalc_rate() argument
128 if (prate != AC100_RTC_32K_RATE) { in ac100_clkout_recalc_rate()
131 prate = divider_recalc_rate(hw, prate, div, in ac100_clkout_recalc_rate()
138 return divider_recalc_rate(hw, prate, div, NULL, in ac100_clkout_recalc_rate()
144 unsigned long prate) in ac100_clkout_round_rate() argument
149 if (prate == AC100_RTC_32K_RATE) in ac100_clkout_round_rate()
150 return divider_round_rate(hw, rate, &prate, NULL, in ac100_clkout_round_rate()
155 tmp_prate = DIV_ROUND_UP(prate, ac100_clkout_prediv[i].val); in ac100_clkout_round_rate()
178 unsigned long tmp, prate; in ac100_clkout_determine_rate() local
200 prate = clk_hw_get_rate(parent); in ac100_clkout_determine_rate()
[all …]
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| /linux-6.1.9/drivers/clk/samsung/ |
| D | clk-cpu.c | 106 unsigned long drate, unsigned long *prate) in exynos_cpuclk_round_rate() argument
109 *prate = clk_hw_round_rate(parent, drate); in exynos_cpuclk_round_rate()
110 return *prate; in exynos_cpuclk_round_rate()
159 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_pre_rate_change()
160 if (cfg_data->prate == 0) in exynos_cpuclk_pre_rate_change()
236 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_post_rate_change()
237 if (cfg_data->prate == 0) in exynos_cpuclk_post_rate_change()
287 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos5433_cpuclk_pre_rate_change()
288 if (cfg_data->prate == 0) in exynos5433_cpuclk_pre_rate_change()
482 for (num_cfgs = 0; list->cfg[num_cfgs].prate != 0; ) in samsung_clk_register_cpu()
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| /linux-6.1.9/drivers/clk/x86/ |
| D | clk-cgu.c | 153 unsigned long *prate) in lgm_clk_divider_round_rate() argument
157 return divider_round_rate(hw, rate, prate, divider->table, in lgm_clk_divider_round_rate()
163 unsigned long prate) in lgm_clk_divider_set_rate() argument
169 value = divider_get_val(rate, prate, divider->table, in lgm_clk_divider_set_rate()
423 u64 prate; in lgm_clk_ddiv_recalc_rate() local
431 prate = (u64)parent_rate; in lgm_clk_ddiv_recalc_rate()
432 do_div(prate, div0); in lgm_clk_ddiv_recalc_rate()
433 do_div(prate, div1); in lgm_clk_ddiv_recalc_rate()
436 do_div(prate, ddiv->div); in lgm_clk_ddiv_recalc_rate()
437 prate *= ddiv->mult; in lgm_clk_ddiv_recalc_rate()
[all …]
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| D | clk-cgu-pll.c | 24 lgm_pll_calc_rate(unsigned long prate, unsigned int mult, in lgm_pll_calc_rate() argument
29 rate64 = prate; in lgm_pll_calc_rate()
39 static unsigned long lgm_pll_recalc_rate(struct clk_hw *hw, unsigned long prate) in lgm_pll_recalc_rate() argument
54 return lgm_pll_calc_rate(prate, mult, div, frac, BIT(24)); in lgm_pll_recalc_rate()
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| /linux-6.1.9/drivers/clk/ |
| D | clk-vt8500.c | 132 unsigned long *prate) in vt8500_dclk_round_rate() argument
140 divisor = *prate / rate; in vt8500_dclk_round_rate()
143 if (rate * divisor < *prate) in vt8500_dclk_round_rate()
154 return *prate / divisor; in vt8500_dclk_round_rate()
598 unsigned long *prate) in vtwm_pll_round_rate() argument
607 ret = vt8500_find_pll_bits(rate, *prate, &mul, &div1); in vtwm_pll_round_rate()
609 round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1); in vtwm_pll_round_rate()
612 ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2); in vtwm_pll_round_rate()
614 round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2); in vtwm_pll_round_rate()
617 ret = wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2); in vtwm_pll_round_rate()
[all …]
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| D | clk-lmk04832.c | 371 unsigned long prate) in lmk04832_vco_recalc_rate() argument
402 vco_rate = (prate << FIELD_GET(LMK04832_BIT_PLL2_MISC_REF_2X_EN, in lmk04832_vco_recalc_rate()
456 static long lmk04832_calc_pll2_params(unsigned long prate, unsigned long rate, in lmk04832_calc_pll2_params() argument
466 div = gcd(rate, prate); in lmk04832_calc_pll2_params()
469 pll2_r = DIV_ROUND_CLOSEST(prate, div); in lmk04832_calc_pll2_params()
487 return DIV_ROUND_CLOSEST(prate * 2 * pll2_p * pll2_n, pll2_r); in lmk04832_calc_pll2_params()
491 unsigned long *prate) in lmk04832_vco_round_rate() argument
502 vco_rate = lmk04832_calc_pll2_params(*prate, rate, &n, &p, &r); in lmk04832_vco_round_rate()
515 unsigned long prate) in lmk04832_vco_set_rate() argument
533 vco_rate = lmk04832_calc_pll2_params(prate, rate, &n, &p, &r); in lmk04832_vco_set_rate()
[all …]
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| /linux-6.1.9/drivers/clk/axs10x/ |
| D | i2s_pll_clock.c | 86 static const struct i2s_pll_cfg *i2s_pll_get_cfg(unsigned long prate) in i2s_pll_get_cfg() argument
88 switch (prate) { in i2s_pll_get_cfg()
112 unsigned long *prate) in i2s_pll_round_rate() argument
115 const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(*prate); in i2s_pll_round_rate()
119 dev_err(clk->dev, "invalid parent rate=%ld\n", *prate); in i2s_pll_round_rate()
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| /linux-6.1.9/drivers/gpu/drm/pl111/ |
| D | pl111_display.c | 447 unsigned long *prate, bool set_parent) in pl111_clk_div_choose_div() argument
461 this_prate = *prate; in pl111_clk_div_choose_div()
472 *prate = best_prate; in pl111_clk_div_choose_div()
477 unsigned long *prate) in pl111_clk_div_round_rate() argument
479 int div = pl111_clk_div_choose_div(hw, rate, prate, true); in pl111_clk_div_round_rate()
481 return DIV_ROUND_UP_ULL(*prate, div); in pl111_clk_div_round_rate()
485 unsigned long prate) in pl111_clk_div_recalc_rate() argument
493 return prate; in pl111_clk_div_recalc_rate()
500 return DIV_ROUND_UP_ULL(prate, div); in pl111_clk_div_recalc_rate()
504 unsigned long prate) in pl111_clk_div_set_rate() argument
[all …]
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| /linux-6.1.9/drivers/clk/rockchip/ |
| D | clk-pll.c | 65 unsigned long drate, unsigned long *prate) in rockchip_pll_round_rate() argument
164 unsigned long prate) in rockchip_rk3036_pll_recalc_rate() argument
168 u64 rate64 = prate; in rockchip_rk3036_pll_recalc_rate()
177 u64 frac_rate64 = prate * cur.frac; in rockchip_rk3036_pll_recalc_rate()
249 unsigned long prate) in rockchip_rk3036_pll_set_rate() argument
255 __func__, __clk_get_name(hw->clk), drate, prate); in rockchip_rk3036_pll_set_rate()
401 unsigned long prate) in rockchip_rk3066_pll_recalc_rate() argument
405 u64 rate64 = prate; in rockchip_rk3066_pll_recalc_rate()
412 return prate; in rockchip_rk3066_pll_recalc_rate()
484 unsigned long prate) in rockchip_rk3066_pll_set_rate() argument
[all …]
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| /linux-6.1.9/drivers/gpu/drm/atmel-hlcdc/ |
| D | atmel_hlcdc_crtc.c | 74 unsigned long prate; in atmel_hlcdc_crtc_mode_set_nofb() local
103 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk); in atmel_hlcdc_crtc_mode_set_nofb()
106 prate *= 2; in atmel_hlcdc_crtc_mode_set_nofb()
111 div = DIV_ROUND_UP(prate, mode_rate); in atmel_hlcdc_crtc_mode_set_nofb()
117 prate /= 2; in atmel_hlcdc_crtc_mode_set_nofb()
118 div = DIV_ROUND_UP(prate, mode_rate); in atmel_hlcdc_crtc_mode_set_nofb()
122 int div_low = prate / mode_rate; in atmel_hlcdc_crtc_mode_set_nofb()
125 (10 * (prate / div_low - mode_rate) < in atmel_hlcdc_crtc_mode_set_nofb()
126 (mode_rate - prate / div))) in atmel_hlcdc_crtc_mode_set_nofb()
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