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Searched refs:ppe (Results 1 – 25 of 35) sorted by relevance

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/linux-6.1.9/drivers/net/ethernet/mediatek/
Dmtk_ppe.c25 static void ppe_w32(struct mtk_ppe *ppe, u32 reg, u32 val) in ppe_w32() argument
27 writel(val, ppe->base + reg); in ppe_w32()
30 static u32 ppe_r32(struct mtk_ppe *ppe, u32 reg) in ppe_r32() argument
32 return readl(ppe->base + reg); in ppe_r32()
35 static u32 ppe_m32(struct mtk_ppe *ppe, u32 reg, u32 mask, u32 set) in ppe_m32() argument
39 val = ppe_r32(ppe, reg); in ppe_m32()
42 ppe_w32(ppe, reg, val); in ppe_m32()
47 static u32 ppe_set(struct mtk_ppe *ppe, u32 reg, u32 val) in ppe_set() argument
49 return ppe_m32(ppe, reg, 0, val); in ppe_set()
52 static u32 ppe_clear(struct mtk_ppe *ppe, u32 reg, u32 val) in ppe_clear() argument
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Dmtk_ppe.h308 void mtk_ppe_start(struct mtk_ppe *ppe);
309 int mtk_ppe_stop(struct mtk_ppe *ppe);
311 void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash);
314 mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) in mtk_ppe_check_skb() argument
318 if (!ppe) in mtk_ppe_check_skb()
325 diff = now - ppe->foe_check_time[hash]; in mtk_ppe_check_skb()
329 ppe->foe_check_time[hash] = now; in mtk_ppe_check_skb()
330 __mtk_ppe_check_skb(ppe, skb, hash); in mtk_ppe_check_skb()
354 int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
355 void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
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Dmtk_ppe_debugfs.c78 struct mtk_ppe *ppe = m->private; in mtk_ppe_debugfs_foe_show() local
82 struct mtk_foe_entry *entry = mtk_foe_get_entry(ppe, i); in mtk_ppe_debugfs_foe_show()
178 int mtk_ppe_debugfs_init(struct mtk_ppe *ppe, int index) in mtk_ppe_debugfs_init() argument
182 snprintf(ppe->dirname, sizeof(ppe->dirname), "ppe%d", index); in mtk_ppe_debugfs_init()
184 root = debugfs_create_dir(ppe->dirname, NULL); in mtk_ppe_debugfs_init()
185 debugfs_create_file("entries", S_IRUGO, root, ppe, &mtk_ppe_debugfs_foe_all_fops); in mtk_ppe_debugfs_init()
186 debugfs_create_file("bind", S_IRUGO, root, ppe, &mtk_ppe_debugfs_foe_bind_fops); in mtk_ppe_debugfs_init()
Dmtk_ppe_offload.c450 err = mtk_foe_entry_commit(eth->ppe[entry->ppe_index], entry); in mtk_flow_offload_replace()
462 mtk_foe_entry_clear(eth->ppe[entry->ppe_index], entry); in mtk_flow_offload_replace()
480 mtk_foe_entry_clear(eth->ppe[entry->ppe_index], entry); in mtk_flow_offload_destroy()
501 idle = mtk_foe_entry_idle_time(eth->ppe[entry->ppe_index], entry); in mtk_flow_offload_stats()
Dmtk_eth_soc.h1114 struct mtk_ppe *ppe[2]; member
1146 mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) in mtk_foe_get_entry() argument
1148 const struct mtk_soc_data *soc = ppe->eth->soc; in mtk_foe_get_entry()
1150 return ppe->foe_table + hash * soc->foe_entry_size; in mtk_foe_get_entry()
/linux-6.1.9/Documentation/devicetree/bindings/net/
Dhisilicon-hip04-net.txt10 phandle, specifies a reference to the syscon ppe node
22 * Ethernet ppe node:
28 - compatible: "hisilicon,hip04-ppe", "syscon".
60 ppe: ppe@28c0000 {
61 compatible = "hisilicon,hip04-ppe", "syscon";
70 port-handle = <&ppe 31 0 31>;
78 port-handle = <&ppe 0 1 0>;
87 port-handle = <&ppe 8 2 8>;
Dhisilicon-hns-dsaf.txt23 - reg-names: may be ppe-base and(or) dsaf-base. It is used to find the
64 reg-names = "ppe-base", "dsaf-base";
/linux-6.1.9/block/partitions/
Daix.c50 struct ppe { struct
64 struct ppe ppe[1016]; argument
232 struct ppe *p = pvd->ppe + i; in aix_partition()
/linux-6.1.9/arch/powerpc/platforms/cell/
Dcbe_thermal.c272 static DEVICE_PREFIX_ATTR(ppe, throttle_end, 0600);
273 static DEVICE_PREFIX_ATTR(ppe, throttle_begin, 0600);
274 static DEVICE_PREFIX_ATTR(ppe, throttle_full_stop, 0600);
309 tpr.ppe = 0x1F0803; in init_default_values()
/linux-6.1.9/arch/mips/lantiq/
Dclk.c30 unsigned long io, unsigned long ppe) in clkdev_add_static() argument
35 cpu_clk_generic[3].rate = ppe; in clkdev_add_static()
Dclk.h73 unsigned long io, unsigned long ppe);
/linux-6.1.9/Documentation/devicetree/bindings/media/
Dnvidia,tegra-vde.yaml36 - const: ppe
106 reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
/linux-6.1.9/drivers/media/platform/nvidia/tegra-vde/
Dvde.h99 void __iomem *ppe; member
218 if (vde->ppe == base) in tegra_vde_reg_base_name()
Dvde.c250 vde->ppe = devm_platform_ioremap_resource_byname(pdev, "ppe"); in tegra_vde_probe()
251 if (IS_ERR(vde->ppe)) in tegra_vde_probe()
252 return PTR_ERR(vde->ppe); in tegra_vde_probe()
Dh264.c286 tegra_vde_set_bits(vde, 0x000A, vde->ppe, 0x14); in tegra_vde_setup_hw_context()
287 tegra_vde_set_bits(vde, 0x000A, vde->ppe, 0x28); in tegra_vde_setup_hw_context()
/linux-6.1.9/arch/powerpc/include/asm/
Dcell-regs.h49 u32 ppe; member
/linux-6.1.9/include/linux/mtd/
Dnand.h41 #define NAND_MEMORG(bpc, ps, os, ppe, epl, mbb, ppl, lpt, nt) \ argument
46 .pages_per_eraseblock = (ppe), \
/linux-6.1.9/drivers/net/wireless/intel/iwlwifi/mvm/
Dmac80211.c1796 static u8 iwl_mvm_he_get_ppe_val(u8 *ppe, u8 ppe_pos_bit) in iwl_mvm_he_get_ppe_val() argument
1804 return (ppe[byte_num] >> bit_num) & in iwl_mvm_he_get_ppe_val()
1815 res = (ppe[byte_num + 1] & in iwl_mvm_he_get_ppe_val()
1818 res += (ppe[byte_num] >> bit_num) & (BIT(residue_bits) - 1); in iwl_mvm_he_get_ppe_val()
1825 u8 ru_index_bitmap, u8 *ppe, u8 ppe_pos_bit) in iwl_mvm_parse_ppe() argument
1854 high_th = iwl_mvm_he_get_ppe_val(ppe, ppe_pos_bit); in iwl_mvm_parse_ppe()
1856 low_th = iwl_mvm_he_get_ppe_val(ppe, ppe_pos_bit); in iwl_mvm_parse_ppe()
1870 u8 *ppe = &sta->deflink.he_cap.ppe_thres[0]; in iwl_mvm_set_pkt_ext_from_he_ppe() local
1872 u8_get_bits(*ppe, in iwl_mvm_set_pkt_ext_from_he_ppe()
1877 iwl_mvm_parse_ppe(mvm, pkt_ext, nss, ru_index_bitmap, ppe, ppe_pos_bit); in iwl_mvm_set_pkt_ext_from_he_ppe()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c696 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
700 vp_width = pipe_src_param->viewport_width_c / ppe; in get_surf_rq_param()
705 vp_width = pipe_src_param->viewport_width / ppe; in get_surf_rq_param()
Ddisplay_rq_dlg_calc_20v2.c696 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
700 vp_width = pipe_src_param->viewport_width_c / ppe; in get_surf_rq_param()
705 vp_width = pipe_src_param->viewport_width / ppe; in get_surf_rq_param()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c705 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
709 vp_width = pipe_param->src.viewport_width_c / ppe; in get_surf_rq_param()
714 vp_width = pipe_param->src.viewport_width / ppe; in get_surf_rq_param()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c671 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
675 vp_width = pipe_param->src.viewport_width_c / ppe; in get_surf_rq_param()
681 vp_width = pipe_param->src.viewport_width / ppe; in get_surf_rq_param()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddml1_display_rq_dlg_calc.c567 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
625 vp_width = pipe_src_param->viewport_width_c / ppe; in get_surf_rq_param()
630 vp_width = pipe_src_param->viewport_width / ppe; in get_surf_rq_param()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c664 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
668 vp_width = pipe_param->src.viewport_width_c / ppe; in get_surf_rq_param()
674 vp_width = pipe_param->src.viewport_width / ppe; in get_surf_rq_param()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c752 unsigned int ppe = mode_422 ? 2 : 1; in get_surf_rq_param() local
756 vp_width = pipe_param->src.viewport_width_c / ppe; in get_surf_rq_param()
762 vp_width = pipe_param->src.viewport_width / ppe; in get_surf_rq_param()

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