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Searched refs:plltype (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/ssb/
Ddriver_chipcommon.c392 u32 *plltype, u32 *n, u32 *m) in ssb_chipco_get_clockcpu() argument
395 *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_get_clockcpu()
396 switch (*plltype) { in ssb_chipco_get_clockcpu()
415 u32 *plltype, u32 *n, u32 *m) in ssb_chipco_get_clockcontrol() argument
418 *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_get_clockcontrol()
419 switch (*plltype) { in ssb_chipco_get_clockcontrol()
606 u32 plltype; in ssb_chipco_serial_init() local
612 plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_serial_init()
615 if (plltype == SSB_PLLTYPE_1) { in ssb_chipco_serial_init()
617 baud_base = ssb_calc_clock_rate(plltype, in ssb_chipco_serial_init()
Dmain.c844 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) in ssb_calc_clock_rate() argument
851 switch (plltype) { in ssb_calc_clock_rate()
875 switch (plltype) { in ssb_calc_clock_rate()
891 switch (plltype) { in ssb_calc_clock_rate()
897 if ((plltype == SSB_PLLTYPE_1) || in ssb_calc_clock_rate()
898 (plltype == SSB_PLLTYPE_3)) in ssb_calc_clock_rate()
942 u32 plltype; in ssb_clockspeed() local
949 ssb_extif_get_clockcontrol(&bus->extif, &plltype, in ssb_clockspeed()
952 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, in ssb_clockspeed()
960 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); in ssb_clockspeed()
[all …]
Dssb_private.h160 extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m);
/linux-6.1.9/include/linux/ssb/
Dssb_driver_extif.h172 u32 *plltype, u32 *n, u32 *m);
205 u32 *plltype, u32 *n, u32 *m) in ssb_extif_get_clockcontrol() argument
Dssb_driver_chipcommon.h621 u32 *plltype, u32 *n, u32 *m);
623 u32 *plltype, u32 *n, u32 *m);
/linux-6.1.9/drivers/gpu/drm/nouveau/dispnv04/
Dhw.c164 nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype, in nouveau_hw_get_pllvals() argument
174 ret = nvbios_pll_parse(bios, plltype, &pll_lim); in nouveau_hw_get_pllvals()
215 nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype) in nouveau_hw_get_clock() argument
224 if (plltype == PLL_MEMORY && in nouveau_hw_get_clock()
235 if (plltype == PLL_MEMORY && in nouveau_hw_get_clock()
244 ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals); in nouveau_hw_get_clock()
Dhw.h43 int nouveau_hw_get_pllvals(struct drm_device *, enum nvbios_pll_type plltype,
46 int nouveau_hw_get_clock(struct drm_device *, enum nvbios_pll_type plltype);