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Searched refs:pll_a (Results 1 – 25 of 42) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/i915/display/
Ddvo_ns2501.c210 u8 pll_a; /* PLL configuration, register A, 1B */ member
237 .pll_a = 17,
257 .pll_a = 25,
276 .pll_a = 11,
614 ns2501_writeb(dvo, NS2501_REG1B, conf->pll_a); in ns2501_mode_set()
/linux-6.1.9/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-graph-card.yaml32 - const: pll_a
77 clock-names = "pll_a", "plla_out0";
Dnvidia,tegra-audio-trimslice.yaml32 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm8753.yaml78 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm9712.yaml75 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-alc5632.yaml73 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-rt5640.yaml83 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-sgtl5000.yaml66 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-max98090.yaml96 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-rt5677.yaml99 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm8903.yaml92 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-common.yaml22 - const: pll_a
/linux-6.1.9/arch/arm/boot/dts/
Dtegra20-plutux.dts60 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-tec.dts69 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-medcom-wide.dts95 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-trimslice.dts463 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra114-asus-tf701t.dts751 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-paz00.dts668 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-ventana.dts720 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-cardhu.dtsi641 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra124-nyan.dtsi775 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-colibri.dtsi745 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-harmony.dts759 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-seaboard.dts918 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-colibri.dtsi1047 clock-names = "pll_a", "pll_a_out0", "mclk";

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