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Searched refs:pin_mask (Results 1 – 15 of 15) sorted by relevance

/linux-6.1.9/arch/powerpc/sysdev/
Dcpm_common.c122 u32 pin_mask; in cpm2_gpio32_get() local
124 pin_mask = 1 << (31 - gpio); in cpm2_gpio32_get()
126 return !!(in_be32(&iop->dat) & pin_mask); in cpm2_gpio32_get()
129 static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask, in __cpm2_gpio32_set() argument
136 cpm2_gc->cpdata |= pin_mask; in __cpm2_gpio32_set()
138 cpm2_gc->cpdata &= ~pin_mask; in __cpm2_gpio32_set()
148 u32 pin_mask = 1 << (31 - gpio); in cpm2_gpio32_set() local
152 __cpm2_gpio32_set(mm_gc, pin_mask, value); in cpm2_gpio32_set()
163 u32 pin_mask = 1 << (31 - gpio); in cpm2_gpio32_dir_out() local
167 setbits32(&iop->dir, pin_mask); in cpm2_gpio32_dir_out()
[all …]
/linux-6.1.9/arch/powerpc/platforms/8xx/
Dcpm1.c405 u16 pin_mask; in cpm1_gpio16_get() local
407 pin_mask = 1 << (15 - gpio); in cpm1_gpio16_get()
409 return !!(in_be16(&iop->dat) & pin_mask); in cpm1_gpio16_get()
412 static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask, in __cpm1_gpio16_set() argument
419 cpm1_gc->cpdata |= pin_mask; in __cpm1_gpio16_set()
421 cpm1_gc->cpdata &= ~pin_mask; in __cpm1_gpio16_set()
431 u16 pin_mask = 1 << (15 - gpio); in cpm1_gpio16_set() local
435 __cpm1_gpio16_set(mm_gc, pin_mask, value); in cpm1_gpio16_set()
454 u16 pin_mask = 1 << (15 - gpio); in cpm1_gpio16_dir_out() local
458 setbits16(&iop->dir, pin_mask); in cpm1_gpio16_dir_out()
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/linux-6.1.9/drivers/gpio/
Dgpio-mxs.c68 u32 pin_mask = 1 << d->hwirq; in mxs_gpio_set_irq_type() local
79 port->both_edges &= ~pin_mask; in mxs_gpio_set_irq_type()
82 val = readl(port->base + PINCTRL_DIN(port)) & pin_mask; in mxs_gpio_set_irq_type()
87 port->both_edges |= pin_mask; in mxs_gpio_set_irq_type()
108 writel(pin_mask, pin_addr + MXS_SET); in mxs_gpio_set_irq_type()
109 writel(pin_mask, port->base + PINCTRL_IRQEN(port) + MXS_SET); in mxs_gpio_set_irq_type()
111 writel(pin_mask, pin_addr + MXS_CLR); in mxs_gpio_set_irq_type()
112 writel(pin_mask, port->base + PINCTRL_PIN2IRQ(port) + MXS_SET); in mxs_gpio_set_irq_type()
118 writel(pin_mask, pin_addr + MXS_SET); in mxs_gpio_set_irq_type()
120 writel(pin_mask, pin_addr + MXS_CLR); in mxs_gpio_set_irq_type()
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Dgpio-aspeed-sgpio.c27 const u32 pin_mask; member
457 .pin_mask = GENMASK(9, 6),
499 .pin_mask = GENMASK(10, 6),
513 u32 nr_gpios, sgpio_freq, sgpio_clk_div, gpio_cnt_regval, pin_mask; in aspeed_sgpio_probe() local
531 pin_mask = pdata->pin_mask; in aspeed_sgpio_probe()
574 gpio_cnt_regval = ((nr_gpios / 8) << ASPEED_SGPIO_PINS_SHIFT) & pin_mask; in aspeed_sgpio_probe()
Dgpio-tegra.c215 u32 pin_mask = BIT(GPIO_BIT(offset)); in tegra_gpio_get_direction() local
219 if (!(cnf & pin_mask)) in tegra_gpio_get_direction()
224 if (oe & pin_mask) in tegra_gpio_get_direction()
/linux-6.1.9/drivers/soc/fsl/qe/
Dqe_io.c122 u32 pin_mask, tmp_val; in par_io_data_set() local
129 pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin)); in par_io_data_set()
134 iowrite32be(~pin_mask & tmp_val, &par_io[port].cpdata); in par_io_data_set()
136 iowrite32be(pin_mask | tmp_val, &par_io[port].cpdata); in par_io_data_set()
Dgpio.c57 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); in qe_gpio_get() local
59 return !!(ioread32be(&regs->cpdata) & pin_mask); in qe_gpio_get()
68 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); in qe_gpio_set() local
73 qe_gc->cpdata |= pin_mask; in qe_gpio_set()
75 qe_gc->cpdata &= ~pin_mask; in qe_gpio_set()
/linux-6.1.9/drivers/gpu/drm/i915/
Di915_irq.c1243 u32 *pin_mask, u32 *long_mask, in intel_get_hpd_pins() argument
1250 BUILD_BUG_ON(BITS_PER_TYPE(*pin_mask) < HPD_NUM_PINS); in intel_get_hpd_pins()
1256 *pin_mask |= BIT(pin); in intel_get_hpd_pins()
1264 hotplug_trigger, dig_hotplug_reg, *pin_mask, *long_mask); in intel_get_hpd_pins()
1628 u32 pin_mask = 0, long_mask = 0; in i9xx_hpd_irq_handler() local
1638 intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, in i9xx_hpd_irq_handler()
1643 intel_hpd_irq_handler(dev_priv, pin_mask, long_mask); in i9xx_hpd_irq_handler()
1821 u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0; in ibx_hpd_irq_handler() local
1842 intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, in ibx_hpd_irq_handler()
1847 intel_hpd_irq_handler(dev_priv, pin_mask, long_mask); in ibx_hpd_irq_handler()
[all …]
/linux-6.1.9/drivers/gpu/drm/nouveau/dispnv04/
Dtvnv17.c130 get_tv_detect_quirks(struct drm_device *dev, uint32_t *pin_mask) in get_tv_detect_quirks() argument
136 *pin_mask = device->quirk->tv_pin_mask; in get_tv_detect_quirks()
151 bool reliable = get_tv_detect_quirks(dev, &tv_enc->pin_mask); in nv17_tv_detect()
159 tv_enc->pin_mask = in nv17_tv_detect()
162 tv_enc->pin_mask = in nv17_tv_detect()
166 switch (tv_enc->pin_mask) { in nv17_tv_detect()
804 tv_enc->pin_mask = 0; in nv17_tv_create()
Dtvnv17.h83 uint32_t pin_mask; member
Dtvmodesnv17.c487 if (tv_enc->pin_mask & 0x4) in nv17_tv_update_properties()
489 else if (tv_enc->pin_mask & 0x2) in nv17_tv_update_properties()
/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_hotplug.h22 u32 pin_mask, u32 long_mask);
Dintel_hotplug.c464 u32 pin_mask, u32 long_mask) in intel_hpd_irq_handler() argument
473 if (!pin_mask) in intel_hpd_irq_handler()
489 if (!(BIT(pin) & pin_mask)) in intel_hpd_irq_handler()
516 if (!(BIT(pin) & pin_mask)) in intel_hpd_irq_handler()
Dintel_tc.c139 u32 pin_mask; in intel_tc_port_get_pin_assignment_mask() local
141 pin_mask = intel_uncore_read(uncore, in intel_tc_port_get_pin_assignment_mask()
144 drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff); in intel_tc_port_get_pin_assignment_mask()
147 return (pin_mask & DP_PIN_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx)) >> in intel_tc_port_get_pin_assignment_mask()
/linux-6.1.9/drivers/pinctrl/
Dpinctrl-st.c1097 u32 pin_mask = pc->rt_pin_mask; in st_pctl_dt_setup_retime_dedicated() local
1100 if (BIT(j) & pin_mask) { in st_pctl_dt_setup_retime_dedicated()