Searched refs:pic_width (Results 1 – 16 of 16) sorted by relevance
179 if (dsc_cfg->pic_width > dsc20->max_image_width) in dsc2_validate_stream()309 DC_LOG_DSC("\tpic_width %d", pps->pic_width); in dsc_log_pps()357 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config()368 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()386 dsc_reg_vals->pps.pic_width = dsc_cfg->pic_width; in dsc_prepare_config()396 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()516 reg_vals->pps.pic_width = 0; in dsc_init_reg_values()574 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()623 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
1672 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()
751 int pic_width; in setup_dsc_config() local764 pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; in setup_dsc_config()770 if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width) in setup_dsc_config()843 if (pic_width % max_slices_h == 0) in setup_dsc_config()853 min_slices_h = pic_width / dsc_common_caps.max_slice_width; in setup_dsc_config()854 if (pic_width % dsc_common_caps.max_slice_width) in setup_dsc_config()869 if (pic_width % min_slices_h != 0) in setup_dsc_config()904 slice_width = pic_width / num_slices_h; in setup_dsc_config()
39 to->pic_width = from->pic_width; in copy_pps_fields()
110 u16 pic_width; member348 __be16 pic_width; member
144 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
38 uint32_t pic_width; member
114 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()133 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
462 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()463 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()657 DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); in intel_dsc_pps_configure()886 DSC_SLICE_PER_LINE((vdsc_cfg->pic_width / num_vdsc_instances) / in intel_dsc_pps_configure()
1643 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
68 data = dsc->pic_width << 16; in dpu_hw_dsc_config()
1847 int pic_width; in dpu_encoder_prep_dsc() local1862 pic_width = dsc->pic_width; in dpu_encoder_prep_dsc()1868 this_frame_slices = pic_width / dsc->slice_width; in dpu_encoder_prep_dsc()
941 dsc->pic_width = mode->hdisplay; in dsi_timing_setup()943 DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); in dsi_timing_setup()2503 int pic_width = mode->hdisplay; in msm_dsi_host_check_dsc() local2509 if (pic_width % dsc->slice_width) { in msm_dsi_host_check_dsc()2511 pic_width, dsc->slice_width); in msm_dsi_host_check_dsc()
1034 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()1053 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
7416 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in dp_set_dsc_on_stream()7434 dsc_cfg.pic_width *= opp_cnt; in dp_set_dsc_on_stream()7537 …dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h… in dp_set_dsc_pps_sdp()
8033 #define DSC_PIC_WIDTH(pic_width) ((pic_width) << 16) argument