Searched refs:phyclk_d18_mhz (Results 1 – 14 of 14) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | dcn31_fpu.c | 128 .phyclk_d18_mhz = 667.0, 137 .phyclk_d18_mhz = 667.0, 146 .phyclk_d18_mhz = 667.0, 155 .phyclk_d18_mhz = 667.0, 164 .phyclk_d18_mhz = 667.0, 371 .phyclk_d18_mhz = 445.0, 380 .phyclk_d18_mhz = 667.0, 389 .phyclk_d18_mhz = 667.0, 398 .phyclk_d18_mhz = 667.0, 407 .phyclk_d18_mhz = 667.0, [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | dcn314_fpu.c | 107 .phyclk_d18_mhz = 667.0, 116 .phyclk_d18_mhz = 667.0, 125 .phyclk_d18_mhz = 667.0, 134 .phyclk_d18_mhz = 667.0, 143 .phyclk_d18_mhz = 667.0, 252 clock_limits[i].phyclk_d18_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn314_update_bw_bounding_box_fpu()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_clk_mgr.c | 244 .phyclk_d18_mhz = 667, 252 .phyclk_d18_mhz = 667, 260 .phyclk_d18_mhz = 667, 268 .phyclk_d18_mhz = 667, 276 .phyclk_d18_mhz = 667, 510 bw_params->clk_table.entries[i].phyclk_d18_mhz = bw_params->clk_table.entries[j].phyclk_d18_mhz; in dcn315_clk_mgr_helper_populate_bw_params() 541 bw_params->clk_table.entries[i].phyclk_d18_mhz = def_max.phyclk_d18_mhz; in dcn315_clk_mgr_helper_populate_bw_params() 563 if (!bw_params->clk_table.entries[i].phyclk_d18_mhz) in dcn315_clk_mgr_helper_populate_bw_params() 564 bw_params->clk_table.entries[i].phyclk_d18_mhz = def_max.phyclk_d18_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
D | dcn302_fpu.c | 120 .phyclk_d18_mhz = 667.0, 329 dcn3_02_soc.clock_limits[i].phyclk_d18_mhz = dcn3_02_soc.clock_limits[0].phyclk_d18_mhz; in dcn302_fpu_update_bw_bounding_box()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_clk_mgr.c | 620 bw_params->clk_table.entries[i].phyclk_d18_mhz = bw_params->clk_table.entries[j].phyclk_d18_mhz; in dcn314_clk_mgr_helper_populate_bw_params() 659 bw_params->clk_table.entries[i].phyclk_d18_mhz = def_max.phyclk_d18_mhz; in dcn314_clk_mgr_helper_populate_bw_params() 682 if (!bw_params->clk_table.entries[i].phyclk_d18_mhz) in dcn314_clk_mgr_helper_populate_bw_params() 683 bw_params->clk_table.entries[i].phyclk_d18_mhz = def_max.phyclk_d18_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
D | dcn303_fpu.c | 119 .phyclk_d18_mhz = 667.0, 324 dcn3_03_soc.clock_limits[i].phyclk_d18_mhz = dcn3_03_soc.clock_limits[0].phyclk_d18_mhz; in dcn303_fpu_update_bw_bounding_box()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
D | dcn321_fpu.c | 114 .phyclk_d18_mhz = 667.0, 315 entry.phyclk_d18_mhz = dcn3_21_soc.clock_limits[0].phyclk_d18_mhz; in build_synthetic_soc_states() 687 dcn3_21_soc.clock_limits[i].phyclk_d18_mhz = dcn3_21_soc.clock_limits[0].phyclk_d18_mhz; in dcn321_update_bw_bounding_box_fpu()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
D | dcn301_fpu.c | 363 s[i].phyclk_d18_mhz = in dcn301_update_bw_bounding_box() 364 dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn301_update_bw_bounding_box()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | clk_mgr.h | 94 unsigned int phyclk_d18_mhz; member
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | dcn30_fpu.c | 132 .phyclk_d18_mhz = 667.0, 608 dcn3_0_soc.clock_limits[i].phyclk_d18_mhz = dcn3_0_soc.clock_limits[0].phyclk_d18_mhz; in dcn30_fpu_update_bw_bounding_box()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/ |
D | display_mode_structs.h | 161 double phyclk_d18_mhz; member
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D | display_mode_vba.c | 398 mode_lib->vba.PHYCLKD18PerState[i] = soc->clock_limits[i].phyclk_d18_mhz; in fetch_socbb_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
D | dcn32_fpu.c | 115 .phyclk_d18_mhz = 667.0, 2160 entry.phyclk_d18_mhz = dcn3_2_soc.clock_limits[0].phyclk_d18_mhz; in build_synthetic_soc_states() 2535 dcn3_2_soc.clock_limits[i].phyclk_d18_mhz = dcn3_2_soc.clock_limits[0].phyclk_d18_mhz; in dcn32_update_bw_bounding_box_fpu()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | dcn20_fpu.c | 2225 low_pstate_lvl.phyclk_d18_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].phyclk_d18_mhz; in construct_low_pstate_lvl() 2279 s[k].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn21_update_bw_bounding_box()
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