Searched refs:pfit_control (Results 1 – 8 of 8) sorted by relevance
454 u32 *pfit_control) in i965_scale_aspect() argument465 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()468 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()471 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; in i965_scale_aspect()475 u32 *pfit_control, u32 *pfit_pgm_ratios, in i9xx_scale_aspect() argument501 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()516 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()522 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()534 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; in gmch_panel_fitting() local557 i965_scale_aspect(crtc_state, &pfit_control); in gmch_panel_fitting()[all …]
938 u32 pfit_control = intel_de_read(dev_priv, PFIT_CONTROL); in update_pfit_vscale_ratio() local948 if (pfit_control & VERT_AUTO_SCALE) in update_pfit_vscale_ratio()
265 u32 pfit_control; in cdv_intel_lvds_mode_set() local280 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in cdv_intel_lvds_mode_set()284 pfit_control = 0; in cdv_intel_lvds_mode_set()286 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_lvds_mode_set()289 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in cdv_intel_lvds_mode_set()291 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
459 u32 pfit_control; in psb_intel_lvds_mode_set() local474 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in psb_intel_lvds_mode_set()478 pfit_control = 0; in psb_intel_lvds_mode_set()481 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in psb_intel_lvds_mode_set()483 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
348 u32 pfit_control; in oaktrail_panel_fitter_pipe() local350 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()353 if ((pfit_control & PFIT_ENABLE) == 0) in oaktrail_panel_fitter_pipe()355 return (pfit_control >> 29) & 3; in oaktrail_panel_fitter_pipe()
79 u32 pfit_control; in psb_intel_panel_fitter_pipe() local81 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()84 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()
560 u32 pfit_control; in cdv_intel_panel_fitter_pipe() local562 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()565 if ((pfit_control & PFIT_ENABLE) == 0) in cdv_intel_panel_fitter_pipe()567 return (pfit_control >> 29) & 0x3; in cdv_intel_panel_fitter_pipe()
1088 uint32_t pfit_control; in cdv_intel_dp_mode_set() local1093 pfit_control = PFIT_ENABLE; in cdv_intel_dp_mode_set()1095 pfit_control = 0; in cdv_intel_dp_mode_set()1097 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_dp_mode_set()1099 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()