Searched refs:parent_rates (Results 1 – 2 of 2) sorted by relevance
104 unsigned long parent_rates[] = { in clk_pfdv2_determine_rate() local115 for (i = 0; i < ARRAY_SIZE(parent_rates); i++) { in clk_pfdv2_determine_rate()116 tmp = parent_rates[i]; in clk_pfdv2_determine_rate()126 tmp = parent_rates[i]; in clk_pfdv2_determine_rate()132 best_parent_rate = parent_rates[i]; in clk_pfdv2_determine_rate()
1082 unsigned int parent_rates[5]; member1131 parent_clock_rate = uart_clock_base->parent_rates[parent_clock_idx]; in mvebu_uart_clock_prepare()1153 prev_clock_rate = uart_clock_base->parent_rates[prev_clock_idx]; in mvebu_uart_clock_prepare()1373 ARRAY_SIZE(uart_clock_base->parent_rates)); in mvebu_uart_clock_probe()1451 uart_clock_base->parent_rates[i] = rate; in mvebu_uart_clock_probe()