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/linux-6.1.9/arch/mips/ath79/
Dclock.c150 u32 out_div; in ar933x_clocks_init() local
169 out_div = 1; in ar933x_clocks_init()
192 out_div = (1 << t); in ar933x_clocks_init()
205 ref_div * out_div * cpu_div); in ar933x_clocks_init()
207 ref_div * out_div * ddr_div); in ar933x_clocks_init()
209 ref_div * out_div * ahb_div); in ar933x_clocks_init()
213 u32 frac, u32 out_div) in ar934x_get_pll_freq() argument
228 ret /= (1 << out_div); in ar934x_get_pll_freq()
238 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
255 out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & in ar934x_clocks_init()
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