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Searched refs:num_slices_h (Results 1 – 15 of 15) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dsc/
Ddc_dsc.c54 const uint32_t num_slices_h,
62 const uint32_t num_slices_h,
367 config.num_slices_h, &dsc_common_caps, timing, range); in dc_dsc_compute_bandwidth_range()
471 const uint32_t num_slices_h, in compute_bpp_x16_from_target_bandwidth() argument
480 timing, num_slices_h, is_dp); in compute_bpp_x16_from_target_bandwidth()
500 const uint32_t num_slices_h, in decide_dsc_bandwidth_range() argument
536 range->max_target_bpp_x16, num_slices_h, dsc_caps->is_dp); in decide_dsc_bandwidth_range()
540 range->min_target_bpp_x16, num_slices_h, dsc_caps->is_dp); in decide_dsc_bandwidth_range()
557 const int num_slices_h, in decide_dsc_target_bpp_x16() argument
565 num_slices_h, dsc_common_caps, timing, &range)) { in decide_dsc_target_bpp_x16()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc_dsc.h81 uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
85 const int num_slices_h,
Ddc_hw_types.h801 uint32_t num_slices_h; /* Number of DSC slices - horizontal */ member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dsc.c188 DC_LOG_DSC("\tnum_slices_h %d", config->dc_dsc_cfg.num_slices_h); in dsc_config_log()
354 ASSERT(dsc_cfg->dc_dsc_cfg.num_slices_h); in dsc_prepare_config()
366 if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || in dsc_prepare_config()
383 dsc_reg_vals->num_slices_h = dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
392 dsc_reg_vals->ich_reset_at_eol = (dsc_cfg->is_odm || dsc_reg_vals->num_slices_h > 1) ? 0xF : 0; in dsc_prepare_config()
396 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
580 NUMBER_OF_SLICES_PER_LINE, reg_vals->num_slices_h - 1, in dsc_write_to_registers()
586 reg_vals->num_slices_h - 1, ALTERNATE_ICH_ENCODING_EN, in dsc_write_to_registers()
Ddcn20_dsc.h532 uint32_t num_slices_h; member
Ddcn20_resource.c1680 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_hwseq.c120 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
121 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
132 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_mst_types.c624 uint32_t num_slices_h; member
663 if (params[i].num_slices_h) in set_dsc_configs_from_fairness_vars()
664 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
924 params[count].num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in compute_mst_dsc_configs_for_link()
Damdgpu_dm.c5714 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_hwseq.c1040 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
1041 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
1052 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_stream.c108 stream->timing.dsc_cfg.num_slices_h = 0; in dc_stream_construct()
Ddc_link_dp.c7422 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in dp_set_dsc_on_stream()
7423 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dp_set_dsc_on_stream()
7433 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in dp_set_dsc_on_stream()
Ddc_link.c4807 timing->dsc_cfg.num_slices_h, in dc_bandwidth_in_kbps_from_timing()
Ddc.c2869 uint32_t enable_dsc = (update->dsc_config->num_slices_h != 0 && in copy_stream_update_to_stream()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c1217 pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h; in dcn20_populate_dml_pipes_from_context()