/linux-6.1.9/drivers/crypto/qat/qat_common/ |
D | adf_isr.c | 25 u32 msix_num_entries = hw_data->num_banks + 1; in adf_enable_msix() 160 int clust_irq = hw_data->num_banks; in adf_free_irqs() 164 for (i = 0; i < hw_data->num_banks; i++) { in adf_free_irqs() 185 int clust_irq = hw_data->num_banks; in adf_request_irqs() 191 for (i = 0; i < hw_data->num_banks; i++) { in adf_request_irqs() 215 cpu = ((accel_dev->accel_id * hw_data->num_banks) + in adf_request_irqs() 255 msix_num_entries += hw_data->num_banks; in adf_isr_alloc_msix_vectors_data() 279 for (i = 0; i < hw_data->num_banks; i++) in adf_setup_bh() 292 for (i = 0; i < hw_data->num_banks; i++) { in adf_cleanup_bh()
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D | adf_transport.c | 480 u32 num_banks = 0; in adf_init_etr_data() local 488 num_banks = GET_MAX_BANKS(accel_dev); in adf_init_etr_data() 489 size = num_banks * sizeof(struct adf_etr_bank_data); in adf_init_etr_data() 505 for (i = 0; i < num_banks; i++) { in adf_init_etr_data() 548 u32 i, num_banks = GET_MAX_BANKS(accel_dev); in adf_cleanup_etr_handles() local 550 for (i = 0; i < num_banks; i++) in adf_cleanup_etr_handles()
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D | adf_accel_devices.h | 219 u8 num_banks; member 241 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
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/linux-6.1.9/drivers/nvmem/ |
D | nintendo-otp.c | 35 unsigned int num_banks; member 40 .num_banks = 1, 45 .num_banks = 8, 103 config.size = data->num_banks * BANK_SIZE; in nintendo_otp_probe()
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/linux-6.1.9/drivers/hwspinlock/ |
D | sun6i_hwspinlock.c | 96 u32 num_banks; in sun6i_hwspinlock_probe() local 146 num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28; in sun6i_hwspinlock_probe() 147 switch (num_banks) { in sun6i_hwspinlock_probe() 149 priv->nlocks = 1 << (4 + num_banks); in sun6i_hwspinlock_probe() 153 dev_err(&pdev->dev, "unsupported hwspinlock setup (%d)\n", num_banks); in sun6i_hwspinlock_probe()
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/linux-6.1.9/drivers/mtd/nand/raw/ingenic/ |
D | ingenic_nand_drv.c | 48 unsigned int num_banks; member 459 if (num_chips > nfc->num_banks) { in ingenic_nand_init_chips() 461 num_chips, nfc->num_banks); in ingenic_nand_init_chips() 482 unsigned int num_banks; in ingenic_nand_probe() local 486 num_banks = jz4780_nemc_num_banks(dev); in ingenic_nand_probe() 487 if (num_banks == 0) { in ingenic_nand_probe() 492 nfc = devm_kzalloc(dev, struct_size(nfc, cs, num_banks), GFP_KERNEL); in ingenic_nand_probe() 509 nfc->num_banks = num_banks; in ingenic_nand_probe()
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/linux-6.1.9/drivers/soc/qcom/ |
D | llcc-qcom.c | 660 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; in _qcom_llcc_cfg_program() 771 u32 num_banks; in qcom_llcc_probe() local 810 &num_banks); in qcom_llcc_probe() 814 num_banks &= LLCC_LB_CNT_MASK; in qcom_llcc_probe() 815 num_banks >>= LLCC_LB_CNT_SHIFT; in qcom_llcc_probe() 816 drv_data->num_banks = num_banks; in qcom_llcc_probe() 825 drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), in qcom_llcc_probe() 832 for (i = 0; i < num_banks; i++) in qcom_llcc_probe()
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D | ocmem.c | 306 int i, j, ret, num_banks; in ocmem_dev_probe() local 363 num_banks = ocmem->num_ports / 2; in ocmem_dev_probe() 364 region_size = ocmem->config->macro_size * num_banks; in ocmem_dev_probe() 380 if (WARN_ON(num_banks > ARRAY_SIZE(region->macro_state))) { in ocmem_dev_probe() 386 region->num_macros = num_banks; in ocmem_dev_probe()
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/linux-6.1.9/drivers/gpio/ |
D | gpio-brcmstb.c | 362 int num_banks = in brcmstb_gpio_sanity_check_banks() local 365 if (res_num_banks != num_banks) { in brcmstb_gpio_sanity_check_banks() 367 res_num_banks, num_banks); in brcmstb_gpio_sanity_check_banks() 600 int num_banks = 0; in brcmstb_gpio_probe() local 655 num_banks); in brcmstb_gpio_probe() 656 num_banks++; in brcmstb_gpio_probe() 668 bank->id = num_banks; in brcmstb_gpio_probe() 727 num_banks++; in brcmstb_gpio_probe()
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D | gpio-stmpe.c | 182 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); in stmpe_gpio_irq_sync_unlock() local 213 for (j = 0; j < num_banks; j++) { in stmpe_gpio_irq_sync_unlock() 376 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); in stmpe_gpio_irq() local 394 ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status); in stmpe_gpio_irq() 398 for (i = 0; i < num_banks; i++) { in stmpe_gpio_irq() 400 num_banks - i - 1; in stmpe_gpio_irq()
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D | gpio-tegra186.c | 92 unsigned int num_banks; member 729 if (gpio->num_irq > gpio->num_banks) { in tegra186_gpio_irqs_per_bank() 730 if (gpio->num_irq % gpio->num_banks != 0) in tegra186_gpio_irqs_per_bank() 734 if (gpio->num_irq < gpio->num_banks) in tegra186_gpio_irqs_per_bank() 737 gpio->num_irqs_per_bank = gpio->num_irq / gpio->num_banks; in tegra186_gpio_irqs_per_bank() 746 gpio->num_irq, gpio->num_banks); in tegra186_gpio_irqs_per_bank() 769 if (gpio->soc->ports[i].bank > gpio->num_banks) in tegra186_gpio_probe() 770 gpio->num_banks = gpio->soc->ports[i].bank; in tegra186_gpio_probe() 772 gpio->num_banks++; in tegra186_gpio_probe() 880 irq->parents = devm_kcalloc(&pdev->dev, gpio->num_banks, in tegra186_gpio_probe() [all …]
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/linux-6.1.9/drivers/thermal/ |
D | mtk_thermal.c | 261 s32 num_banks; member 404 .num_banks = MT8173_NUM_ZONES, 444 .num_banks = 1, 475 .num_banks = 1, 500 .num_banks = MT7622_NUM_ZONES, 532 .num_banks = MT8183_NUM_ZONES, 688 for (i = 0; i < mt->conf->num_banks; i++) { in mtk_read_temp() 1079 for (i = 0; i < mt->conf->num_banks; i++) in mtk_thermal_probe()
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/linux-6.1.9/drivers/leds/ |
D | leds-lm3697.c | 90 int num_banks; member 193 for (i = 0; i < priv->num_banks; i++) { in lm3697_init() 325 led->num_banks = count; in lm3697_probe()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn10/ |
D | dcn10_fpu.c | 117 .num_banks = 8,
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/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_socbb.h | 68 uint32_t num_banks; member
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/linux-6.1.9/drivers/crypto/qat/qat_c3xxxvf/ |
D | adf_c3xxxvf_hw_data.c | 63 hw_data->num_banks = ADF_C3XXXIOV_ETR_MAX_BANKS; in adf_init_hw_data_c3xxxiov()
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/linux-6.1.9/drivers/crypto/qat/qat_dh895xccvf/ |
D | adf_dh895xccvf_hw_data.c | 63 hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS; in adf_init_hw_data_dh895xcciov()
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/linux-6.1.9/drivers/crypto/qat/qat_c62xvf/ |
D | adf_c62xvf_hw_data.c | 63 hw_data->num_banks = ADF_C62XIOV_ETR_MAX_BANKS; in adf_init_hw_data_c62xiov()
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/linux-6.1.9/drivers/edac/ |
D | qcom_edac.c | 298 for (i = 0; i < drv->num_banks; i++) { in llcc_ecc_irq_handler() 349 llcc_driv_data->num_banks, 1, in qcom_llcc_edac_probe()
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/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_plane.c | 171 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in fill_gfx8_tiling_info_from_flags() local 177 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in fill_gfx8_tiling_info_from_flags() 180 tiling_info->gfx8.num_banks = num_banks; in fill_gfx8_tiling_info_from_flags() 204 tiling_info->gfx9.num_banks = in fill_gfx9_tiling_info_from_device() 205 adev->gfx.config.gb_addr_config_fields.num_banks; in fill_gfx9_tiling_info_from_device() 241 tiling_info->gfx9.num_banks = 1u << mod_bank_xor_bits; in fill_gfx9_tiling_info_from_modifier() 395 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in add_gfx9_modifiers()
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/linux-6.1.9/include/linux/soc/qcom/ |
D | llcc-qcom.h | 132 u32 num_banks; member
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/linux-6.1.9/drivers/pinctrl/meson/ |
D | pinctrl-meson.h | 119 unsigned int num_banks; member
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_debug.c | 141 plane_state->tiling_info.gfx8.num_banks, in pre_surface_trace() 233 update->plane_info->tiling_info.gfx8.num_banks, in update_surface_trace()
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/linux-6.1.9/drivers/crypto/qat/qat_c3xxx/ |
D | adf_c3xxx_hw_data.c | 92 hw_data->num_banks = ADF_C3XXX_ETR_MAX_BANKS; in adf_init_hw_data_c3xxx()
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/linux-6.1.9/drivers/crypto/qat/qat_c62x/ |
D | adf_c62x_hw_data.c | 94 hw_data->num_banks = ADF_C62X_ETR_MAX_BANKS; in adf_init_hw_data_c62x()
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