/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
D | rv1_clk_mgr.c | 42 … int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks) in rv1_determine_dppclk_threshold() argument 44 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in rv1_determine_dppclk_threshold() 45 bool dispclk_increase = new_clocks->dispclk_khz > clk_mgr->base.clks.dispclk_khz; in rv1_determine_dppclk_threshold() 46 int disp_clk_threshold = new_clocks->max_supported_dppclk_khz; in rv1_determine_dppclk_threshold() 53 return new_clocks->dispclk_khz; in rv1_determine_dppclk_threshold() 58 if (new_clocks->dispclk_khz <= disp_clk_threshold) in rv1_determine_dppclk_threshold() 59 return new_clocks->dispclk_khz; in rv1_determine_dppclk_threshold() 63 return new_clocks->dispclk_khz; in rv1_determine_dppclk_threshold() 72 return new_clocks->dispclk_khz; in rv1_determine_dppclk_threshold() 78 return new_clocks->dispclk_khz; in rv1_determine_dppclk_threshold() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
D | dcn201_clk_mgr.c | 91 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks() local 112 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks() 113 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; in dcn201_update_clocks() 116 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks() 117 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks() 119 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks() 120 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks() 123 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) in dcn201_update_clocks() 124 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn201_update_clocks() 126 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
D | dcn20_clk_mgr.c | 221 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks() local 259 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn2_update_clocks() 260 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn2_update_clocks() 262 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn2_update_clocks() 263 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks() 269 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn2_update_clocks() 270 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn2_update_clocks() 275 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) { in dcn2_update_clocks() 276 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn2_update_clocks() 282 p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0); in dcn2_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_clk_mgr.c | 276 …id dcn32_update_dppclk_dispclk_freq(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks) in dcn32_update_dppclk_dispclk_freq() argument 281 if (new_clocks->dppclk_khz) { in dcn32_update_dppclk_dispclk_freq() 283 * clk_mgr->base.dentist_vco_freq_khz / new_clocks->dppclk_khz; in dcn32_update_dppclk_dispclk_freq() 284 …new_clocks->dppclk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR * clk_mgr->base.dentist_vco_freq_khz)… in dcn32_update_dppclk_dispclk_freq() 286 if (new_clocks->dispclk_khz > 0) { in dcn32_update_dppclk_dispclk_freq() 288 * clk_mgr->base.dentist_vco_freq_khz / new_clocks->dispclk_khz; in dcn32_update_dppclk_dispclk_freq() 289 …new_clocks->dispclk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR * clk_mgr->base.dentist_vco_freq_khz… in dcn32_update_dppclk_dispclk_freq() 298 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn32_update_clocks() local 340 fclk_p_state_change_support = new_clocks->fclk_p_state_change_support || (total_plane_count == 0); in dcn32_update_clocks() 353 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn32_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 197 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn3_update_clocks() local 232 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn3_update_clocks() 233 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn3_update_clocks() 235 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks() 236 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn3_update_clocks() 240 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_d… in dcn3_update_clocks() 241 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn3_update_clocks() 245 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn3_update_clocks() 247 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn3_update_clocks() 251 p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0); in dcn3_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_clk_mgr.c | 133 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn31_update_clocks() local 148 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn31_update_clocks() 149 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks() 150 dcn31_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn31_update_clocks() 152 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks() 155 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn31_update_clocks() 157 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn31_update_clocks() 174 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn31_update_clocks() 175 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks() 178 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
D | dcn316_clk_mgr.c | 149 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn316_update_clocks() local 163 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn316_update_clocks() 165 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn316_update_clocks() 167 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn316_update_clocks() 184 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { in dcn316_update_clocks() 186 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn316_update_clocks() 198 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks() 199 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn316_update_clocks() 204 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn316_update_clocks() 205 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn316_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_clk_mgr.c | 164 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn314_update_clocks() local 179 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn314_update_clocks() 180 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks() 181 dcn314_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn314_update_clocks() 183 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks() 186 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn314_update_clocks() 188 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn314_update_clocks() 205 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn314_update_clocks() 206 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks() 209 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_clk_mgr.c | 117 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn315_update_clocks() local 127 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn315_update_clocks() 132 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn315_update_clocks() 159 if (!new_clocks->p_state_change_support) in dcn315_update_clocks() 160 new_clocks->dcfclk_khz = UNSUPPORTED_DCFCLK; in dcn315_update_clocks() 161 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn315_update_clocks() 162 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn315_update_clocks() 167 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn315_update_clocks() 168 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn315_update_clocks() 174 if (new_clocks->dppclk_khz < MIN_DPP_DISP_CLK) in dcn315_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr.c | 136 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rn_update_clocks() local 174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks() 175 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rn_update_clocks() 180 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in rn_update_clocks() 181 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in rn_update_clocks() 187 if (new_clocks->dppclk_khz < 100000 && new_clocks->dppclk_khz > 0) in rn_update_clocks() 188 new_clocks->dppclk_khz = 100000; in rn_update_clocks() 194 if (new_clocks->dppclk_khz == 0 || new_clocks->dispclk_khz == 0) { in rn_update_clocks() 195 new_clocks->dppclk_khz = clk_mgr_base->clks.dppclk_khz; in rn_update_clocks() 196 new_clocks->dispclk_khz = clk_mgr_base->clks.dispclk_khz; in rn_update_clocks() [all …]
|
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | vg_clk_mgr.c | 100 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in vg_update_clocks() local 142 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks() 143 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in vg_update_clocks() 148 …new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz) && !dc->debug.disable… in vg_update_clocks() 149 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in vg_update_clocks() 155 if (new_clocks->dppclk_khz < 100000) in vg_update_clocks() 156 new_clocks->dppclk_khz = 100000; in vg_update_clocks() 159 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in vg_update_clocks() 160 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in vg_update_clocks() 162 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in vg_update_clocks() [all …]
|
/linux-6.1.9/sound/isa/ |
D | es18xx.c | 354 static const struct snd_ratnum new_clocks[2] = { variable 371 .rats = new_clocks, 402 if (runtime->rate_num == new_clocks[0].num) in snd_es18xx_rate_set()
|