| /linux-6.1.9/drivers/clk/mmp/ |
| D | clk-mix.c | 131 static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val, in _set_rate() argument
163 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
277 u32 div_val, mux_val; in mmp_clk_mix_set_rate_and_parent() local
281 mux_val = _get_mux_val(mix, index); in mmp_clk_mix_set_rate_and_parent()
283 return _set_rate(mix, mux_val, div_val, 1, 1); in mmp_clk_mix_set_rate_and_parent()
293 u32 mux_val; in mmp_clk_mix_get_parent() local
310 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
312 return _get_mux(mix, mux_val); in mmp_clk_mix_get_parent()
350 u32 div_val, mux_val; in mmp_clk_set_parent() local
362 mux_val = _get_mux_val(mix, item->parent_index); in mmp_clk_set_parent()
[all …]
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| /linux-6.1.9/drivers/gpio/ |
| D | gpio-sodaville.c | 185 u32 mux_val; in sdv_gpio_probe() local
205 ret = of_property_read_u32(pdev->dev.of_node, "intel,muxctl", &mux_val); in sdv_gpio_probe()
207 writel(mux_val, sd->gpio_pub_base + GPMUXCTL); in sdv_gpio_probe()
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| /linux-6.1.9/drivers/dma/ti/ |
| D | dma-crossbar.c | 48 u8 mux_val; member
70 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
112 map->mux_val = (u8)dma_spec->args[2]; in ti_am335x_xbar_route_allocate()
118 map->mux_val, map->dma_line); in ti_am335x_xbar_route_allocate()
120 ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val); in ti_am335x_xbar_route_allocate()
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| /linux-6.1.9/drivers/pinctrl/bcm/ |
| D | pinctrl-bcm6328.c | 35 unsigned mux_val:2; member
246 .mux_val = mux, \
331 bcm6328_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6328_pinctrl_set_mux()
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| D | pinctrl-bcm6318.c | 36 unsigned mux_val:2; member
310 .mux_val = mux, \
417 bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6318_pinctrl_set_mux()
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| /linux-6.1.9/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,scu-pinctrl.yaml | 38 and pad setting for the pin. The first 2 integers - pin_id and mux_val - are
49 "mux_val" indicates the mux value to be applied.
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| D | fsl,imxrt1050.yaml | 37 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
51 "mux_val" indicates the mux value to be applied.
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| D | fsl,imxrt1170.yaml | 37 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
51 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx8mm-pinctrl.yaml | 36 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
50 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx8mn-pinctrl.yaml | 36 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
50 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx8mp-pinctrl.yaml | 36 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
50 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx8mq-pinctrl.yaml | 36 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
50 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx93-pinctrl.yaml | 39 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
53 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx7d-pinctrl.yaml | 45 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
59 "mux_val" indicates the mux value to be applied.
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| D | fsl,imx6sx-pinctrl.txt | 9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx6sll-pinctrl.txt | 9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx6ul-pinctrl.txt | 10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx-pinctrl.txt | 26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| /linux-6.1.9/drivers/clk/x86/ |
| D | clk-cgu.h | 185 unsigned int mux_val; member
219 .mux_val = _v, \
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| D | clk-cgu.c | 128 lgm_set_clk_val(mux->membase, reg, shift, width, list->mux_val); in lgm_clk_register_mux()
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| /linux-6.1.9/drivers/pinctrl/ |
| D | pinctrl-zynq.c | 71 unsigned int mux_val; member
761 .mux_val = mval, \
769 .mux_val = mval, \
928 reg |= func->mux_val << ZYNQ_PINMUX_MUX_SHIFT; in zynq_pinmux_set_mux()
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| D | pinctrl-bm1880.c | 67 u32 mux_val; member
653 .mux_val = mval, \
998 regval |= func->mux_val << mux_offset; in bm1880_pinmux_set_mux()
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