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Searched refs:mul_shift (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/clk/at91/
Dclk-pll.c20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
359 .mul_shift = 16,
365 .mul_shift = 16,
371 .mul_shift = 16,
377 .mul_shift = 18,
Dclk-sam9x60-pll.c96 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
111 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set()
263 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg()
270 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_set_rate_chg()
Dpmc.h63 u8 mul_shift; member
Dsam9x60.c49 .mul_shift = 24,
Dsama7g5.c73 .mul_shift = 24,