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Searched refs:mul_mask (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/clk/at91/
Dclk-pll.c21 (layout)->mul_mask)
23 #define PLL_MUL_MASK(layout) ((layout)->mul_mask)
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
360 .mul_mask = 0x7FF,
366 .mul_mask = 0xFF,
372 .mul_mask = 0x3F,
378 .mul_mask = 0x7F,
Dpmc.h59 u32 mul_mask; member
Dsam9x60.c47 .mul_mask = GENMASK(31, 24),
Dclk-sam9x60-pll.c96 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
263 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg()
Dsama7g5.c71 .mul_mask = GENMASK(31, 24),
/linux-6.1.9/drivers/clk/actions/
Dowl-pll.c28 return mul & mul_mask(pll_hw); in owl_pll_calculate_mul()
93 val &= mul_mask(pll_hw); in owl_pll_recalc_rate()
105 val &= mul_mask(pll_hw); in owl_pll_recalc_rate()
177 reg &= ~mul_mask(pll_hw); in owl_pll_set_rate()
Dowl-pll.h99 #define mul_mask(m) ((1 << ((m)->width)) - 1) macro