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Searched refs:mpc_shift (Results 1 – 24 of 24) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c44 mpc20->mpc_shift->field_name, mpc20->mpc_mask->field_name
164 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A; in mpc2_set_output_csc()
166 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A; in mpc2_set_output_csc()
222 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
224 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
250 reg->shifts.exp_region0_lut_offset = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
252 reg->shifts.exp_region0_num_segments = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
254 reg->shifts.exp_region1_lut_offset = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
256 reg->shifts.exp_region1_num_segments = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
258 reg->shifts.field_region_end = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
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Ddcn20_mpc.h266 const struct dcn20_mpc_shift *mpc_shift; member
273 const struct dcn20_mpc_shift *mpc_shift,
Ddcn20_resource.c484 static const struct dcn20_mpc_shift mpc_shift = { variable
859 &mpc_shift, in dcn20_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_mpc.c40 mpc201->mpc_shift->field_name, mpc201->mpc_mask->field_name
106 const struct dcn201_mpc_shift *mpc_shift, in dcn201_mpc_construct() argument
117 mpc201->mpc_shift = mpc_shift; in dcn201_mpc_construct()
Ddcn201_mpc.h75 const struct dcn201_mpc_shift *mpc_shift; member
82 const struct dcn201_mpc_shift *mpc_shift,
Ddcn201_resource.c493 static const struct dcn201_mpc_shift mpc_shift = { variable
733 &mpc_shift, in dcn201_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mpc.c41 mpc30->mpc_shift->field_name, mpc30->mpc_mask->field_name
179 reg->shifts.field_region_start_base = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_START_BASE_B; in mpc3_ogam_get_reg_field()
181 reg->shifts.field_offset = mpc30->mpc_shift->MPCC_OGAM_RAMA_OFFSET_B; in mpc3_ogam_get_reg_field()
184 reg->shifts.exp_region0_lut_offset = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc3_ogam_get_reg_field()
186 reg->shifts.exp_region0_num_segments = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc3_ogam_get_reg_field()
188 reg->shifts.exp_region1_lut_offset = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc3_ogam_get_reg_field()
190 reg->shifts.exp_region1_num_segments = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in mpc3_ogam_get_reg_field()
193 reg->shifts.field_region_end = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc3_ogam_get_reg_field()
195 reg->shifts.field_region_end_slope = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc3_ogam_get_reg_field()
197 reg->shifts.field_region_end_base = mpc30->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_BASE_B; in mpc3_ogam_get_reg_field()
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Ddcn30_mpc.h998 const struct dcn30_mpc_shift *mpc_shift; member
1006 const struct dcn30_mpc_shift *mpc_shift,
Ddcn30_resource.c548 static const struct dcn30_mpc_shift mpc_shift = { variable
859 &mpc_shift, in dcn30_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_mpc.c42 mpc30->mpc_shift->field_name, mpc30->mpc_mask->field_name
142 reg->shifts.exp_region0_lut_offset = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION0_LUT_OFFSET; in mpc32_post1dlut_get_reg_field()
144 …reg->shifts.exp_region0_num_segments = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION0_NUM_SEGMENT… in mpc32_post1dlut_get_reg_field()
146 reg->shifts.exp_region1_lut_offset = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION1_LUT_OFFSET; in mpc32_post1dlut_get_reg_field()
148 …reg->shifts.exp_region1_num_segments = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION1_NUM_SEGMENT… in mpc32_post1dlut_get_reg_field()
151 reg->shifts.field_region_end = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION_END_B; in mpc32_post1dlut_get_reg_field()
153 reg->shifts.field_region_end_slope = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION_END_SLOPE_B; in mpc32_post1dlut_get_reg_field()
155 reg->shifts.field_region_end_base = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION_END_BASE_B; in mpc32_post1dlut_get_reg_field()
157 …reg->shifts.field_region_linear_slope = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION_START_SLOPE… in mpc32_post1dlut_get_reg_field()
159 reg->shifts.exp_region_start = mpc->mpc_shift->MPCC_MCM_1DLUT_RAMA_EXP_REGION_START_B; in mpc32_post1dlut_get_reg_field()
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Ddcn32_mpc.h317 const struct dcn30_mpc_shift *mpc_shift,
Ddcn32_resource.c460 static const struct dcn30_mpc_shift mpc_shift = { variable
967 &mpc_shift, in dcn32_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_mpc.h130 const struct dcn_mpc_shift *mpc_shift; member
137 const struct dcn_mpc_shift *mpc_shift,
Ddcn10_mpc.c37 mpc10->mpc_shift->field_name, mpc10->mpc_mask->field_name
516 const struct dcn_mpc_shift *mpc_shift, in dcn10_mpc_construct() argument
527 mpc10->mpc_shift = mpc_shift; in dcn10_mpc_construct()
Ddcn10_resource.c378 static const struct dcn_mpc_shift mpc_shift = { variable
686 &mpc_shift, in dcn10_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c646 static const struct dcn30_mpc_shift mpc_shift = { variable
661 dcn30_mpc_construct(mpc30, ctx, &mpc_regs, &mpc_shift, &mpc_mask, num_mpcc, num_rmu); in dcn302_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c593 static const struct dcn30_mpc_shift mpc_shift = { variable
608 dcn30_mpc_construct(mpc30, ctx, &mpc_regs, &mpc_shift, &mpc_mask, num_mpcc, num_rmu); in dcn303_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c292 static const struct dcn20_mpc_shift mpc_shift = { variable
1105 &mpc_shift, in dcn21_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c523 static const struct dcn30_mpc_shift mpc_shift = { variable
821 &mpc_shift, in dcn301_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_resource.c619 static const struct dcn30_mpc_shift mpc_shift = { variable
1051 &mpc_shift, in dcn31_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn315/
Ddcn315_resource.c595 static const struct dcn30_mpc_shift mpc_shift = { variable
1021 &mpc_shift, in dcn31_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn316/
Ddcn316_resource.c595 static const struct dcn30_mpc_shift mpc_shift = { variable
1020 &mpc_shift, in dcn31_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn321/
Ddcn321_resource.c459 static const struct dcn30_mpc_shift mpc_shift = { variable
966 &mpc_shift, in dcn321_mpc_create()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c598 static const struct dcn30_mpc_shift mpc_shift = { variable
1025 &mpc_shift, in dcn31_mpc_create()