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Searched refs:mpc (Results 1 – 25 of 77) sorted by relevance

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/linux-6.1.9/net/atm/
Dmpc.c69 static void MPOA_trigger_rcvd(struct k_message *msg, struct mpoa_client *mpc);
70 static void MPOA_res_reply_rcvd(struct k_message *msg, struct mpoa_client *mpc);
71 static void ingress_purge_rcvd(struct k_message *msg, struct mpoa_client *mpc);
72 static void egress_purge_rcvd(struct k_message *msg, struct mpoa_client *mpc);
73 static void mps_death(struct k_message *msg, struct mpoa_client *mpc);
74 static void clean_up(struct k_message *msg, struct mpoa_client *mpc,
77 struct mpoa_client *mpc);
79 struct mpoa_client *mpc);
81 struct mpoa_client *mpc);
83 static const uint8_t *copy_macs(struct mpoa_client *mpc,
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Dmpoa_caches.c133 static int cache_hit(in_cache_entry *entry, struct mpoa_client *mpc) in cache_hit() argument
143 if (entry->count > mpc->parameters.mpc_p1) { in cache_hit()
146 memcpy(msg.MPS_ctrl, mpc->mps_ctrl_addr, ATM_ESA_LEN); in cache_hit()
150 msg_to_mpoad(&msg, mpc); in cache_hit()
162 if (entry->count > mpc->parameters.mpc_p1 && in cache_hit()
165 mpc->dev->name, &entry->ctrl_info.in_dst_ip); in cache_hit()
168 memcpy(msg.MPS_ctrl, mpc->mps_ctrl_addr, ATM_ESA_LEN); in cache_hit()
173 msg_to_mpoad(&msg, mpc); in cache_hit()
324 static void in_destroy_cache(struct mpoa_client *mpc) in in_destroy_cache() argument
326 write_lock_irq(&mpc->ingress_lock); in in_destroy_cache()
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Dmpoa_proc.c107 struct mpoa_client *mpc; in mpc_start() local
111 for (mpc = mpcs; mpc; mpc = mpc->next) in mpc_start()
113 return mpc; in mpc_start()
133 struct mpoa_client *mpc = v; in mpc_show() local
145 seq_printf(m, "\nInterface %d:\n\n", mpc->dev_num); in mpc_show()
149 for (in_entry = mpc->in_cache; in_entry; in_entry = in_entry->next) { in mpc_show()
168 for (eg_entry = mpc->eg_cache; eg_entry; eg_entry = eg_entry->next) { in mpc_show()
Dmpoa_caches.h15 void atm_mpoa_init_cache(struct mpoa_client *mpc);
51 void (*destroy_cache)(struct mpoa_client *mpc);
77 void (*destroy_cache)(struct mpoa_client *mpc);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Dmpc.h177 struct mpc { struct
203 struct mpc *mpc, argument
226 struct mpc *mpc,
247 struct mpc *mpc,
261 void (*mpc_init)(struct mpc *mpc);
263 struct mpc *mpc,
279 struct mpc *mpc,
297 struct mpc *mpc,
320 struct mpc *mpc,
340 struct mpc *mpc,
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_mpc.c45 static void mpc32_mpc_init(struct mpc *mpc) in mpc32_mpc_init() argument
47 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc32_mpc_init()
50 mpc1_mpc_init(mpc); in mpc32_mpc_init()
52 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) { in mpc32_mpc_init()
68 struct mpc *mpc, in mpc32_power_on_blnd_lut() argument
72 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc32_power_on_blnd_lut()
74 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.cm) { in mpc32_power_on_blnd_lut()
91 static enum dc_lut_mode mpc32_get_post1dlut_current(struct mpc *mpc, uint32_t mpcc_id) in mpc32_get_post1dlut_current() argument
97 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc32_get_post1dlut_current()
124 struct mpc *mpc, in mpc32_configure_post1dlut() argument
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Ddcn32_hwseq.c521 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_mpc_shaper_3dlut() local
540 result = mpc->funcs->program_3dlut(mpc, in dcn32_set_mpc_shaper_3dlut()
544 result = mpc->funcs->program_shaper(mpc, in dcn32_set_mpc_shaper_3dlut()
557 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_mcm_luts() local
572 result = mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
588 result = mpc->funcs->program_shaper(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
592 result = mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func->lut_3d, mpcc_id); in dcn32_set_mcm_luts()
594 result = mpc->funcs->program_3dlut(mpc, NULL, mpcc_id); in dcn32_set_mcm_luts()
604 struct mpc *mpc = dc->res_pool->mpc; in dcn32_set_input_transfer_func() local
611 if (mpc == NULL || plane_state == NULL) in dcn32_set_input_transfer_func()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mpc.c48 struct mpc *mpc, in mpc3_is_dwb_idle() argument
51 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_is_dwb_idle()
63 struct mpc *mpc, in mpc3_set_dwb_mux() argument
67 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_set_dwb_mux()
74 struct mpc *mpc, in mpc3_disable_dwb_mux() argument
77 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_disable_dwb_mux()
84 struct mpc *mpc, in mpc3_set_out_rate_control() argument
90 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_set_out_rate_control()
102 enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, int mpcc_id) in mpc3_get_ogam_current() argument
110 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_get_ogam_current()
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Ddcn30_mpc.h993 struct mpc base;
1012 struct mpc *mpc,
1017 struct mpc *mpc,
1021 uint32_t mpcc3_acquire_rmu(struct mpc *mpc,
1025 struct mpc *mpc,
1030 struct mpc *mpc,
1035 struct mpc *mpc,
1041 struct mpc *mpc,
1047 struct mpc *mpc,
1052 struct mpc *mpc,
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Ddcn30_hwseq.c99 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_mpc_shaper_3dlut() local
129 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut()
133 result = mpc->funcs->program_3dlut(mpc, in dcn30_set_mpc_shaper_3dlut()
136 result = mpc->funcs->program_shaper(mpc, shaper_lut, in dcn30_set_mpc_shaper_3dlut()
140 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut()
194 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_output_transfer_func() local
202 if (ret == false && mpc->funcs->set_output_gamma && stream->out_transfer_func) { in dcn30_set_output_transfer_func()
209 &mpc->blender_params, false)) in dcn30_set_output_transfer_func()
210 params = &mpc->blender_params; in dcn30_set_output_transfer_func()
217 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn30_set_output_transfer_func()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_mpc.h125 struct mpc base;
142 struct mpc *mpc,
151 struct mpc *mpc,
156 struct mpc *mpc);
159 struct mpc *mpc,
163 struct mpc *mpc,
167 struct mpc *mpc,
172 struct mpc *mpc,
177 struct mpc *mpc,
181 struct mpc *mpc,
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Ddcn10_mpc.c40 void mpc1_set_bg_color(struct mpc *mpc, in mpc1_set_bg_color() argument
44 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_set_bg_color()
45 struct mpcc *bottommost_mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_set_bg_color()
77 struct mpc *mpc, in mpc1_update_blending() argument
81 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_update_blending()
82 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_update_blending()
95 struct mpc *mpc, in mpc1_update_stereo_mix() argument
99 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_update_stereo_mix()
109 void mpc1_assert_idle_mpcc(struct mpc *mpc, int id) in mpc1_assert_idle_mpcc() argument
111 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_assert_idle_mpcc()
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Ddcn10_resource.c676 static struct mpc *dcn10_mpc_create(struct dc_context *ctx) in dcn10_mpc_create()
926 if (pool->base.mpc != NULL) { in dcn10_resource_destruct()
927 kfree(TO_DCN10_MPC(pool->base.mpc)); in dcn10_resource_destruct()
928 pool->base.mpc = NULL; in dcn10_resource_destruct()
1430 dc->caps.color.mpc.gamut_remap = 0; in dcn10_resource_construct()
1431 dc->caps.color.mpc.num_3dluts = 0; in dcn10_resource_construct()
1432 dc->caps.color.mpc.shared_3d_lut = 0; in dcn10_resource_construct()
1433 dc->caps.color.mpc.ogam_ram = 0; in dcn10_resource_construct()
1434 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn10_resource_construct()
1435 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn10_resource_construct()
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/linux-6.1.9/arch/x86/kernel/
Dmpparse.c144 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) in smp_check_mpc() argument
147 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { in smp_check_mpc()
149 mpc->signature[0], mpc->signature[1], in smp_check_mpc()
150 mpc->signature[2], mpc->signature[3]); in smp_check_mpc()
153 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { in smp_check_mpc()
157 if (mpc->spec != 0x01 && mpc->spec != 0x04) { in smp_check_mpc()
158 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec); in smp_check_mpc()
161 if (!mpc->lapic) { in smp_check_mpc()
165 memcpy(oem, mpc->oem, 8); in smp_check_mpc()
169 memcpy(str, mpc->productid, 12); in smp_check_mpc()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c49 struct mpc *mpc, in mpc2_update_blending() argument
53 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_update_blending()
55 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc2_update_blending()
74 struct mpc *mpc, in mpc2_set_denorm() argument
78 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_set_denorm()
112 struct mpc *mpc, in mpc2_set_denorm_clamp() argument
116 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_set_denorm_clamp()
132 struct mpc *mpc, in mpc2_set_output_csc() argument
138 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_set_output_csc()
186 struct mpc *mpc, in mpc2_set_ocsc_default() argument
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Ddcn20_mpc.h261 struct mpc base;
278 struct mpc *mpc,
283 struct mpc *mpc,
288 struct mpc *mpc,
293 struct mpc *mpc,
299 struct mpc *mpc,
305 struct mpc *mpc,
309 void mpc2_assert_idle_mpcc(struct mpc *mpc, int id);
310 void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id);
311 void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
Ddcn20_hwseq.c662 struct mpc *mpc = dc->res_pool->mpc; in dcn20_enable_stream_timing() local
734 if (mpc->funcs->set_out_rate_control) { in dcn20_enable_stream_timing()
736 mpc->funcs->set_out_rate_control( in dcn20_enable_stream_timing()
737 mpc, opp_inst[i], in dcn20_enable_stream_timing()
803 struct mpc *mpc = dc->res_pool->mpc; in dcn20_program_output_csc() local
807 if (mpc->funcs->power_on_mpc_mem_pwr) in dcn20_program_output_csc()
808 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_program_output_csc()
811 if (mpc->funcs->set_output_csc != NULL) in dcn20_program_output_csc()
812 mpc->funcs->set_output_csc(mpc, in dcn20_program_output_csc()
817 if (mpc->funcs->set_ocsc_default != NULL) in dcn20_program_output_csc()
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/linux-6.1.9/arch/mips/sgi-ip30/
Dip30-smp.c79 struct mpconf *mpc; in ip30_smp_setup() local
85 mpc = (struct mpconf *)MPCONF(i); in ip30_smp_setup()
86 if (mpc->magic == MPCONF_MAGIC) { in ip30_smp_setup()
91 i, mpc->prid, mpc->physid, mpc->virtid); in ip30_smp_setup()
112 struct mpconf *mpc = (struct mpconf *)MPCONF(cpu); in ip30_smp_boot_secondary() local
115 mpc->stackaddr = (void *)__KSTK_TOS(idle); in ip30_smp_boot_secondary()
118 mpc->lnch_parm = task_thread_info(idle); in ip30_smp_boot_secondary()
123 mpc->launch = smp_bootstrap; in ip30_smp_boot_secondary()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_hwseq.c304 res_pool->mpc->funcs->mpc_init(res_pool->mpc); in dcn201_init_hw()
394 struct mpc *mpc = dc->res_pool->mpc; in dcn201_plane_atomic_disconnect() local
403 if (mpc->funcs->get_mpcc_for_dpp_from_secondary) in dcn201_plane_atomic_disconnect()
404 mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp_from_secondary(mpc_tree_params, dpp_id); in dcn201_plane_atomic_disconnect()
407 if (mpcc_to_remove != NULL && mpc->funcs->remove_mpcc_from_secondary) { in dcn201_plane_atomic_disconnect()
408 mpc->funcs->remove_mpcc_from_secondary(mpc, mpc_tree_params, mpcc_to_remove); in dcn201_plane_atomic_disconnect()
413 mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id); in dcn201_plane_atomic_disconnect()
415 mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove); in dcn201_plane_atomic_disconnect()
443 struct mpc *mpc = dc->res_pool->mpc; in dcn201_update_mpcc() local
500 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn201_update_mpcc()
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Ddcn201_resource.c723 static struct mpc *dcn201_mpc_create(struct dc_context *ctx, uint32_t num_mpcc) in dcn201_mpc_create()
926 if (pool->base.mpc != NULL) { in dcn201_resource_destruct()
927 kfree(TO_DCN201_MPC(pool->base.mpc)); in dcn201_resource_destruct()
928 pool->base.mpc = NULL; in dcn201_resource_destruct()
1143 dc->caps.color.mpc.gamut_remap = 0; in dcn201_resource_construct()
1144 dc->caps.color.mpc.num_3dluts = 0; in dcn201_resource_construct()
1145 dc->caps.color.mpc.shared_3d_lut = 0; in dcn201_resource_construct()
1146 dc->caps.color.mpc.ogam_ram = 1; in dcn201_resource_construct()
1147 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn201_resource_construct()
1148 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn201_resource_construct()
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Ddcn201_mpc.c43 struct mpc *mpc, in mpc201_set_out_rate_control() argument
49 struct dcn201_mpc *mpc201 = TO_DCN201_MPC(mpc); in mpc201_set_out_rate_control()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_hwseq.c190 struct mpc *mpc = dc->res_pool->mpc; in dcn314_update_odm() local
208 if (mpc->funcs->set_out_rate_control) { in dcn314_update_odm()
210 mpc->funcs->set_out_rate_control( in dcn314_update_odm()
211 mpc, opp_inst[i], in dcn314_update_odm()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c654 static struct mpc *dcn302_mpc_create(struct dc_context *ctx, int num_mpcc, int num_rmu) in dcn302_mpc_create()
1024 if (pool->mpc != NULL) { in dcn302_resource_destruct()
1025 kfree(TO_DCN20_MPC(pool->mpc)); in dcn302_resource_destruct()
1026 pool->mpc = NULL; in dcn302_resource_destruct()
1259 dc->caps.color.mpc.gamut_remap = 1; in dcn302_resource_construct()
1260 dc->caps.color.mpc.num_3dluts = pool->res_cap->num_mpc_3dlut; //3 in dcn302_resource_construct()
1261 dc->caps.color.mpc.ogam_ram = 1; in dcn302_resource_construct()
1262 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn302_resource_construct()
1263 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn302_resource_construct()
1264 dc->caps.color.mpc.ogam_rom_caps.gamma2_2 = 0; in dcn302_resource_construct()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c601 static struct mpc *dcn303_mpc_create(struct dc_context *ctx, int num_mpcc, int num_rmu) in dcn303_mpc_create()
951 if (pool->mpc != NULL) { in dcn303_resource_destruct()
952 kfree(TO_DCN20_MPC(pool->mpc)); in dcn303_resource_destruct()
953 pool->mpc = NULL; in dcn303_resource_destruct()
1191 dc->caps.color.mpc.gamut_remap = 1; in dcn303_resource_construct()
1192 dc->caps.color.mpc.num_3dluts = pool->res_cap->num_mpc_3dlut; //3 in dcn303_resource_construct()
1193 dc->caps.color.mpc.ogam_ram = 1; in dcn303_resource_construct()
1194 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn303_resource_construct()
1195 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn303_resource_construct()
1196 dc->caps.color.mpc.ogam_rom_caps.gamma2_2 = 0; in dcn303_resource_construct()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c710 if (pool->base.mpc != NULL) { in dcn21_resource_destruct()
711 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn21_resource_destruct()
712 pool->base.mpc = NULL; in dcn21_resource_destruct()
1095 static struct mpc *dcn21_mpc_create(struct dc_context *ctx) in dcn21_mpc_create()
1494 dc->caps.color.mpc.gamut_remap = 0; in dcn21_resource_construct()
1495 dc->caps.color.mpc.num_3dluts = 0; in dcn21_resource_construct()
1496 dc->caps.color.mpc.shared_3d_lut = 0; in dcn21_resource_construct()
1497 dc->caps.color.mpc.ogam_ram = 1; in dcn21_resource_construct()
1498 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn21_resource_construct()
1499 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn21_resource_construct()
[all …]

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