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Searched refs:mmUVD_VCPU_CACHE_SIZE3 (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_offset.h699 #define mmUVD_VCPU_CACHE_SIZE3 … macro
Dvcn_2_0_0_offset.h628 #define mmUVD_VCPU_CACHE_SIZE3 … macro
Dvcn_3_0_0_offset.h1075 #define mmUVD_VCPU_CACHE_SIZE3 … macro