Home
last modified time | relevance | path

Searched refs:mmUVD_MPC_SET_MUXB1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_offset.h173 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h353 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
Dvcn_2_5_offset.h768 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
Dvcn_2_0_0_offset.h603 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
Dvcn_3_0_0_offset.h1148 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro