Searched refs:mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW (Results 1 – 6 of 6) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_2_5_offset.h | 857 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW … macro
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D | vcn_2_0_0_offset.h | 952 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW … macro
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D | vcn_3_0_0_offset.h | 1275 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW … macro
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/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
D | vcn_v2_0.c | 373 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 464 UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v2_0_mc_resume_dpg_mode()
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D | vcn_v2_5.c | 440 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v2_5_mc_resume() 530 VCN, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v2_5_mc_resume_dpg_mode()
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D | vcn_v3_0.c | 486 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW, in vcn_v3_0_mc_resume() 575 VCN, inst_idx, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), in vcn_v3_0_mc_resume_dpg_mode()
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