Searched refs:mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH (Results 1 – 10 of 10) sorted by relevance
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_7_0_offset.h | 76 #define mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH … macro
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/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_1_0_offset.h | 166 #define mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH … macro
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D | vcn_2_5_offset.h | 879 #define mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH … macro
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D | vcn_2_0_0_offset.h | 834 #define mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH … macro
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D | vcn_3_0_0_offset.h | 1365 #define mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH … macro
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/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
D | vcn_v2_0.c | 367 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 455 UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in vcn_v2_0_mc_resume_dpg_mode() 1938 mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in vcn_v2_0_start_sriov()
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D | vcn_v2_5.c | 434 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume() 521 VCN, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in vcn_v2_5_mc_resume_dpg_mode() 1249 mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in vcn_v2_5_sriov_start()
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D | vcn_v3_0.c | 480 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume() 566 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in vcn_v3_0_mc_resume_dpg_mode() 1381 mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in vcn_v3_0_start_sriov()
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D | uvd_v7_0.c | 709 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume() 852 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), in uvd_v7_0_sriov_start()
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D | vcn_v1_0.c | 338 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 411 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_dpg_mode()
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