Searched refs:mmSDMA1_RLC0_RB_WPTR_POLL_CNTL (Results 1 – 11 of 11) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_2_4_d.h | 328 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
|
| D | oss_3_0_1_d.h | 429 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
|
| D | oss_2_0_d.h | 364 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
|
| D | oss_3_0_d.h | 530 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
|
| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
| D | sdma1_4_0_offset.h | 384 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x0147 macro
|
| D | sdma1_4_2_2_offset.h | 384 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
|
| D | sdma1_4_2_offset.h | 380 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
|
| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v5_0.c | 83 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
107 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
156 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
|
| D | sdma_v4_0.c | 110 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
197 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff0, 0x00403000),
|
| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_10_1_0_offset.h | 1383 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
|
| D | gc_10_3_0_offset.h | 1422 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
|