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Searched refs:mmSCRATCH_REG3 (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_offset.h219 #define mmSCRATCH_REG3 … macro
Dgc_9_0_offset.h4647 #define mmSCRATCH_REG3 … macro
Dgc_9_1_offset.h4877 #define mmSCRATCH_REG3 … macro
Dgc_9_2_1_offset.h4833 #define mmSCRATCH_REG3 … macro
Dgc_10_1_0_offset.h7111 #define mmSCRATCH_REG3 … macro
Dgc_10_3_0_offset.h6740 #define mmSCRATCH_REG3 … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1184 #define mmSCRATCH_REG3 0x2143 macro
Dgfx_7_0_d.h407 #define mmSCRATCH_REG3 0xc043 macro
Dgfx_7_2_d.h419 #define mmSCRATCH_REG3 0xc043 macro
Dgfx_8_0_d.h457 #define mmSCRATCH_REG3 0xc043 macro
Dgfx_8_1_d.h457 #define mmSCRATCH_REG3 0xc043 macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c1709 reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG3); in gfx_v9_0_init_rlcg_reg_access_ctrl()
Dgfx_v10_0.c4227 reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG3); in gfx_v10_0_init_rlcg_reg_access_ctrl()