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Searched refs:mmOTG4_OTG_COUNT_RESET_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h7222 #define mmOTG4_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_2_1_0_offset.h8864 #define mmOTG4_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_3_0_2_offset.h8756 #define mmOTG4_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_2_0_0_offset.h9895 #define mmOTG4_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_3_0_0_offset.h9609 #define mmOTG4_OTG_COUNT_RESET_BASE_IDX … macro