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Searched refs:mmMPCC6_MPCC_UPDATE_LOCK_SEL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h5813 #define mmMPCC6_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro
Ddcn_2_0_0_offset.h6751 #define mmMPCC6_MPCC_UPDATE_LOCK_SEL_BASE_IDX … macro